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From 2646be877afc663d1688a2add8386b027c9d7e31 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Mon, 11 Mar 2013 14:08:06 +0100
Subject: [PATCH 11/12] spi/bcm63xx: inline hz usage in
bcm63xx_spi_setup_transfer
bcm63xx_spi_setup_transfer is called from only one place, and that has
t always set, to hz will always be t->speed_hz - just use it directly in
the two places instead of moving it in a local variable.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
---
drivers/spi/spi-bcm63xx.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
--- a/drivers/spi/spi-bcm63xx.c
+++ b/drivers/spi/spi-bcm63xx.c
@@ -97,15 +97,12 @@ static void bcm63xx_spi_setup_transfer(s
struct spi_transfer *t)
{
struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
- u32 hz;
u8 clk_cfg, reg;
int i;
- hz = (t) ? t->speed_hz : spi->max_speed_hz;
-
/* Find the closest clock configuration */
for (i = 0; i < SPI_CLK_MASK; i++) {
- if (hz >= bcm63xx_spi_freq_table[i][0]) {
+ if (t->speed_hz >= bcm63xx_spi_freq_table[i][0]) {
clk_cfg = bcm63xx_spi_freq_table[i][1];
break;
}
@@ -122,7 +119,7 @@ static void bcm63xx_spi_setup_transfer(s
bcm_spi_writeb(bs, reg, SPI_CLK_CFG);
dev_dbg(&spi->dev, "Setting clock register to %02x (hz %d)\n",
- clk_cfg, hz);
+ clk_cfg, t->speed_hz);
}
/* the spi->mode bits understood by this driver: */
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