1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
|
#ifndef _ATHEROS_GPIO_H_
#define _ATHEROS_GPIO_H_
#include "ar531x.h"
/* Common AR531X global variables */
/* extern u32 ar531x_gpio_intr_Mask; */
/* AR5312 exported routines */
#ifdef CONFIG_ATHEROS_AR5312
asmlinkage void ar5312_gpio_irq_dispatch(void);
#endif
/* AR5315 exported routines */
#ifdef CONFIG_ATHEROS_AR5315
asmlinkage void ar5315_gpio_irq_dispatch(void);
#endif
/*
* Wrappers for the generic GPIO layer
*/
/* Sets a gpio to input, or returns ENXIO for non-existent gpio */
static inline int gpio_direction_input(unsigned gpio) {
DO_AR5312( if (gpio > AR531X_NUM_GPIO) { \
return -ENXIO; \
} else { \
sysRegWrite(AR531X_GPIO_CR, \
( sysRegRead(AR531X_GPIO_CR) & \
~(AR531X_GPIO_CR_M(gpio)) ) | \
AR531X_GPIO_CR_I(gpio) ); \
return 0; \
} \
)
DO_AR5315( if (gpio > AR5315_NUM_GPIO) { \
return -ENXIO; \
} else { \
sysRegWrite(AR5315_GPIO_CR, \
( sysRegRead(AR5315_GPIO_CR) & \
~(AR5315_GPIO_CR_M(gpio)) ) | \
AR5315_GPIO_CR_I(gpio) ); \
return 0; \
} \
)
}
/* Sets a gpio to output with value, or returns ENXIO for non-existent gpio */
static inline int gpio_direction_output(unsigned gpio, int value) {
DO_AR5312( if (gpio > AR531X_NUM_GPIO) { \
return -ENXIO; \
} else { \
sysRegWrite(AR531X_GPIO_DO, \
( (sysRegRead(AR531X_GPIO_DO) & \
~(1 << gpio) ) | \
((value!=0) << gpio)) ); \
sysRegWrite(AR531X_GPIO_CR, \
sysRegRead(AR531X_GPIO_CR) | \
AR531X_GPIO_CR_O(gpio) ); \
return 0; \
} \
)
DO_AR5315( if (gpio > AR5315_NUM_GPIO) { \
return -ENXIO; \
} else { \
sysRegWrite(AR5315_GPIO_DO, \
( (sysRegRead(AR5315_GPIO_DO) & \
~(1 << gpio)) | \
((value!=0) << gpio)) ); \
sysRegWrite(AR5315_GPIO_CR, \
sysRegRead(AR5315_GPIO_CR) | \
AR5315_GPIO_CR_O(gpio) ); \
return 0; \
} \
)
}
/* Reads the gpio pin. Unchecked function */
static inline int gpio_get_value(unsigned gpio) {
DO_AR5312(return (sysRegRead(AR531X_GPIO_DI) & (1 << gpio));)
DO_AR5315(return (sysRegRead(AR5315_GPIO_DI) & (1 << gpio));)
}
/* Writes to the gpio pin. Unchecked function */
static inline void gpio_set_value(unsigned gpio, int value) {
DO_AR5312( sysRegWrite(AR531X_GPIO_DO, \
( (sysRegRead(AR531X_GPIO_DO) & \
~(1 << gpio)) | \
((value!=0) << gpio)) ); \
)
DO_AR5315( sysRegWrite(AR5315_GPIO_DO, \
( (sysRegRead(AR5315_GPIO_DO) & \
~(1 << gpio)) | \
((value!=0) << gpio)) ); \
)
}
static inline int gpio_request(unsigned gpio, const char *label) {
return 0;
}
static inline void gpio_free(unsigned gpio) {
}
/* Returns IRQ to attach for gpio. Unchecked function */
static inline int gpio_to_irq(unsigned gpio) {
return AR531X_GPIO_IRQ(gpio);
}
/* Returns gpio for IRQ attached. Unchecked function */
static inline int irq_to_gpio(unsigned irq) {
return (irq - (AR531X_GPIO_IRQ(0)));
}
/* #include <asm-generic/gpio.h> */ /* cansleep wrappers */
/* platforms that don't directly support access to GPIOs through I2C, SPI,
* or other blocking infrastructure can use these wrappers.
*/
static inline int gpio_cansleep(unsigned gpio) {
return 0;
}
static inline int gpio_get_value_cansleep(unsigned gpio) {
might_sleep();
return gpio_get_value(gpio);
}
static inline void gpio_set_value_cansleep(unsigned gpio, int value) {
might_sleep();
gpio_set_value(gpio, value);
}
#endif
|
