blob: 3eaeb8bd33818bfe647e4543e6d5063af40930e7 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
|
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -43,6 +43,7 @@
#include <asm/mmu_context.h>
#include <asm/types.h>
#include <asm/stacktrace.h>
+#include <asm/time.h>
extern asmlinkage void handle_int(void);
extern asmlinkage void handle_tlbm(void);
@@ -1464,6 +1465,8 @@ void __cpuinit per_cpu_trap_init(void)
*/
if (cpu_has_mips_r2) {
cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
+ if (get_c0_compare_irq)
+ cp0_compare_irq = get_c0_compare_irq();
cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
if (cp0_perfcount_irq == cp0_compare_irq)
cp0_perfcount_irq = -1;
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -53,6 +53,7 @@ extern int (*perf_irq)(void);
#ifdef CONFIG_CEVT_R4K
extern int mips_clockevent_init(void);
extern unsigned int __weak get_c0_compare_int(void);
+extern unsigned int __weak get_c0_compare_irq(void);
#else
static inline int mips_clockevent_init(void)
{
|
