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Diffstat (limited to 'target/linux/brcm47xx/patches-3.6/400-arch-bcm47xx.patch')
-rw-r--r--target/linux/brcm47xx/patches-3.6/400-arch-bcm47xx.patch146
1 files changed, 145 insertions, 1 deletions
diff --git a/target/linux/brcm47xx/patches-3.6/400-arch-bcm47xx.patch b/target/linux/brcm47xx/patches-3.6/400-arch-bcm47xx.patch
index 1ed0b8ab6..c8c3158c1 100644
--- a/target/linux/brcm47xx/patches-3.6/400-arch-bcm47xx.patch
+++ b/target/linux/brcm47xx/patches-3.6/400-arch-bcm47xx.patch
@@ -1,6 +1,6 @@
--- a/arch/mips/bcm47xx/nvram.c
+++ b/arch/mips/bcm47xx/nvram.c
-@@ -196,3 +196,30 @@ int bcm47xx_nvram_getenv(char *name, cha
+@@ -198,3 +198,30 @@ int bcm47xx_nvram_getenv(char *name, cha
return -ENOENT;
}
EXPORT_SYMBOL(bcm47xx_nvram_getenv);
@@ -31,3 +31,147 @@
+ return NULL;
+}
+EXPORT_SYMBOL(nvram_get);
+--- a/arch/mips/bcm47xx/Makefile
++++ b/arch/mips/bcm47xx/Makefile
+@@ -4,4 +4,5 @@
+ #
+
+ obj-y += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o
++obj-y += gpio.o
+ obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o
+--- /dev/null
++++ b/arch/mips/bcm47xx/gpio.c
+@@ -0,0 +1,119 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
++ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * Parts of this file are based on Atheros AR71XX/AR724X/AR913X GPIO
++ */
++
++#include <linux/export.h>
++#include <linux/gpio.h>
++#include <linux/ssb/ssb_embedded.h>
++#include <linux/bcma/bcma.h>
++
++#include <bcm47xx.h>
++
++/* low level BCM47xx gpio api */
++u32 bcm47xx_gpio_in(u32 mask)
++{
++ switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++ case BCM47XX_BUS_TYPE_SSB:
++ return ssb_gpio_in(&bcm47xx_bus.ssb, mask);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++ case BCM47XX_BUS_TYPE_BCMA:
++ return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc, mask);
++#endif
++ }
++ return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_in);
++
++u32 bcm47xx_gpio_out(u32 mask, u32 value)
++{
++ switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++ case BCM47XX_BUS_TYPE_SSB:
++ return ssb_gpio_out(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++ case BCM47XX_BUS_TYPE_BCMA:
++ return bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, mask,
++ value);
++#endif
++ }
++ return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_out);
++
++u32 bcm47xx_gpio_outen(u32 mask, u32 value)
++{
++ switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++ case BCM47XX_BUS_TYPE_SSB:
++ return ssb_gpio_outen(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++ case BCM47XX_BUS_TYPE_BCMA:
++ return bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc,
++ mask, value);
++#endif
++ }
++ return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_outen);
++
++u32 bcm47xx_gpio_control(u32 mask, u32 value)
++{
++ switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++ case BCM47XX_BUS_TYPE_SSB:
++ return ssb_gpio_control(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++ case BCM47XX_BUS_TYPE_BCMA:
++ return bcma_chipco_gpio_control(&bcm47xx_bus.bcma.bus.drv_cc,
++ mask, value);
++#endif
++ }
++ return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_control);
++
++u32 bcm47xx_gpio_intmask(u32 mask, u32 value)
++{
++ switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++ case BCM47XX_BUS_TYPE_SSB:
++ return ssb_gpio_intmask(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++ case BCM47XX_BUS_TYPE_BCMA:
++ return bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc,
++ mask, value);
++#endif
++ }
++ return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_intmask);
++
++u32 bcm47xx_gpio_polarity(u32 mask, u32 value)
++{
++ switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++ case BCM47XX_BUS_TYPE_SSB:
++ return ssb_gpio_polarity(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++ case BCM47XX_BUS_TYPE_BCMA:
++ return bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc,
++ mask, value);
++#endif
++ }
++ return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_polarity);
+--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
++++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
+@@ -14,4 +14,11 @@ static inline int irq_to_gpio(unsigned i
+ return -EINVAL;
+ }
+
++u32 bcm47xx_gpio_in(u32 mask);
++u32 bcm47xx_gpio_out(u32 mask, u32 value);
++u32 bcm47xx_gpio_outen(u32 mask, u32 value);
++u32 bcm47xx_gpio_control(u32 mask, u32 value);
++u32 bcm47xx_gpio_intmask(u32 mask, u32 value);
++u32 bcm47xx_gpio_polarity(u32 mask, u32 value);
++
+ #endif