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-rw-r--r--package/mac80211/patches/320-ath9k_pending_work.patch58
1 files changed, 58 insertions, 0 deletions
diff --git a/package/mac80211/patches/320-ath9k_pending_work.patch b/package/mac80211/patches/320-ath9k_pending_work.patch
new file mode 100644
index 000000000..ba40fe819
--- /dev/null
+++ b/package/mac80211/patches/320-ath9k_pending_work.patch
@@ -0,0 +1,58 @@
+--- a/drivers/net/wireless/ath/ath9k/xmit.c
++++ b/drivers/net/wireless/ath/ath9k/xmit.c
+@@ -1685,17 +1685,20 @@ static void ath_tx_start_dma(struct ath_
+ struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+ struct list_head bf_head;
+- struct ath_atx_tid *tid;
++ struct ath_atx_tid *tid = NULL;
+ u8 tidno;
+
+ spin_lock_bh(&txctl->txq->axq_lock);
+
+- if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && txctl->an) {
++ if (ieee80211_is_data_qos(hdr->frame_control) && txctl->an) {
+ tidno = ieee80211_get_qos_ctl(hdr)[0] &
+ IEEE80211_QOS_CTL_TID_MASK;
+ tid = ATH_AN_2_TID(txctl->an, tidno);
+
+ WARN_ON(tid->ac->txq != txctl->txq);
++ }
++
++ if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && tid) {
+ /*
+ * Try aggregation if it's a unicast data frame
+ * and the destination is HT capable.
+@@ -1712,7 +1715,7 @@ static void ath_tx_start_dma(struct ath_
+ ar9003_hw_set_paprd_txdesc(sc->sc_ah, bf->bf_desc,
+ bf->bf_state.bfs_paprd);
+
+- ath_tx_send_normal(sc, txctl->txq, NULL, &bf_head);
++ ath_tx_send_normal(sc, txctl->txq, tid, &bf_head);
+ }
+
+ spin_unlock_bh(&txctl->txq->axq_lock);
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -284,11 +284,9 @@ static void ath9k_hw_read_revisions(stru
+
+ static void ath9k_hw_disablepcie(struct ath_hw *ah)
+ {
+- if (AR_SREV_9100(ah))
++ if (!AR_SREV_5416(ah))
+ return;
+
+- ENABLE_REGWRITE_BUFFER(ah);
+-
+ REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
+ REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
+ REG_WRITE(ah, AR_PCIE_SERDES, 0x28000029);
+@@ -300,8 +298,6 @@ static void ath9k_hw_disablepcie(struct
+ REG_WRITE(ah, AR_PCIE_SERDES, 0x000e1007);
+
+ REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
+-
+- REGWRITE_BUFFER_FLUSH(ah);
+ }
+
+ /* This should work for all families including legacy */