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-rw-r--r--openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch59
1 files changed, 31 insertions, 28 deletions
diff --git a/openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch b/openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch
index c341ecfb7..5328fd12e 100644
--- a/openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch
+++ b/openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch
@@ -10576,8 +10576,8 @@ diff -urN linux.old/arch/mips/bcm947xx/prom.c linux.dev/arch/mips/bcm947xx/prom.
+}
diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbmips.c
--- linux.old/arch/mips/bcm947xx/sbmips.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/arch/mips/bcm947xx/sbmips.c 2005-08-27 02:46:21.265608528 +0200
-@@ -0,0 +1,1036 @@
++++ linux.dev/arch/mips/bcm947xx/sbmips.c 2005-08-30 14:47:52.836470168 +0200
+@@ -0,0 +1,1040 @@
+/*
+ * BCM47XX Sonics SiliconBackplane MIPS core routines
+ *
@@ -10690,12 +10690,18 @@ diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbm
+ div = 1;
+ /* Set the override bit so we don't divide it */
+ W_REG(&cc->corecontrol, CC_UARTCLKO);
++ } else if ((rev >= 3) && (pll == PLL_TYPE6)) {
++ /* Fixed ALP clock */
++ baud_base = 20000000;
++ div = 2;
++ /* Set the override bit so we don't divide it */
++ W_REG(&cc->corecontrol, CC_UARTCLKO);
++ W_REG(&cc->clkdiv, ((R_REG(&cc->clkdiv) & ~CLKD_UART) | div));
+ } else if (rev >= 3) {
+ /* Internal backplane clock */
+ baud_base = sb_clock(sbh);
+ div = 2; /* Minimum divisor */
-+ W_REG(&cc->clkdiv,
-+ ((R_REG(&cc->clkdiv) & ~CLKD_UART) | div));
++ W_REG(&cc->clkdiv, ((R_REG(&cc->clkdiv) & ~CLKD_UART) | div));
+ } else {
+ /* Fixed internal backplane clock */
+ baud_base = 88000000;
@@ -10960,14 +10966,13 @@ diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbm
+ tmp = tmp | CEIL(120, ns); /* W0 = 120nS */
+ W_REG(&eir->prog_waitcount, tmp); /* 0x01020a0c for a 100Mhz clock */
+ } else if ((cc = sb_setcore(sbh, SB_CC, 0))) {
-+
+//==================================tallest===============================================
+ /* set register for external IO to control LED. */
-+ W_REG(&cc->prog_config, 0x11);
-+ tmp = CEIL(10, ns) << FW_W3_SHIFT; /* W3 = 10nS */
-+ tmp = tmp | (CEIL(40, ns) << FW_W1_SHIFT); /* W1 = 40nS */
-+ tmp = tmp | CEIL(240, ns); /* W0 = 120nS */
-+ W_REG(&cc->prog_waitcount, tmp); /* 0x01020a0c for a 100Mhz clock */
++ W_REG(&cc->prog_config, 0x11);
++ tmp = CEIL(10, ns) << FW_W3_SHIFT; /* W3 = 10nS */
++ tmp = tmp | (CEIL(40, ns) << FW_W1_SHIFT); /* W1 = 40nS */
++ tmp = tmp | CEIL(240, ns); /* W0 = 120nS */
++ W_REG(&cc->prog_waitcount, tmp); /* 0x01020a0c for a 100Mhz clock */
+//========================================================================================
+ /* Set timing for the flash */
+ tmp = CEIL(10, ns) << FW_W3_SHIFT; /* W3 = 10nS */
@@ -10990,7 +10995,7 @@ diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbm
+ W_REG(&cc->pcmcia_memwait, tmp);
+ }
+ }
-+
++
+ // Added by Chen-I & Yen for enabling 5350 EXTIF
+ if (BCMINIT(sb_chip)(sbh) == BCM5350_DEVICE_ID)
+ {
@@ -11587,8 +11592,7 @@ diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbm
+ if (config & MEMC_CONFIG_DDR) {
+ ret = (wr << 16) | (rd << 8) | dqsg;
+ } else {
-+ if ( (rev > 0) || (sb_chip(sbh) == BCM5365_DEVICE_ID))
-+
++ if ((rev > 0) || (sb_chip(sbh) == BCM5365_DEVICE_ID))
+ cd = rd;
+ else
+ cd = (rd == MEMC_CD_THRESHOLD) ? rd : (wr + MEMC_CD_THRESHOLD);
@@ -16453,8 +16457,8 @@ diff -urN linux.old/drivers/net/hnd/linux_osl.c linux.dev/drivers/net/hnd/linux_
+#endif /* BINOSL */
diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.c
--- linux.old/drivers/net/hnd/sbutils.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/drivers/net/hnd/sbutils.c 2005-08-27 03:11:17.525240184 +0200
-@@ -0,0 +1,2064 @@
++++ linux.dev/drivers/net/hnd/sbutils.c 2005-08-30 15:09:39.322854048 +0200
+@@ -0,0 +1,2063 @@
+/*
+ * Misc utility routines for accessing chip-specific features
+ * of the SiliconBackplane-based Broadcom chips.
@@ -16466,7 +16470,7 @@ diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.
+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ * $Id$
++ * $Id: sbutils.c,v 1.6 2005/03/07 08:35:32 kanki Exp $
+ */
+
+#include <typedefs.h>
@@ -16486,7 +16490,7 @@ diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.
+#define SB_ERROR(args)
+
+
-+#define CLOCK_BASE_5350 12500000 /* Specific to 5350*/
++#define CLOCK_BASE_5350 12500000 /* Specific to 5350*/
+
+typedef uint32 (*sb_intrsoff_t)(void *intr_arg);
+typedef void (*sb_intrsrestore_t)(void *intr_arg, uint32 arg);
@@ -17937,13 +17941,8 @@ diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.
+ n = R_REG(&cc->clockcontrol_n);
+ if (pll_type == PLL_TYPE6)
+ m = R_REG(&cc->clockcontrol_mips);
-+ else if (pll_type == PLL_TYPE3)
-+ {
-+ // Added by Chen-I for 5365
-+ if (BCMINIT(sb_chip)(sbh) == BCM5365_DEVICE_ID)
-+ m = R_REG(&cc->clockcontrol_sb);
-+ else m = R_REG(&cc->clockcontrol_m2);
-+ }
++ else if ((pll_type == PLL_TYPE3) && (BCMINIT(sb_chip)(sbh) != BCM5365_DEVICE_ID))
++ m = R_REG(&cc->clockcontrol_m2);
+ else
+ m = R_REG(&cc->clockcontrol_sb);
+ } else {
@@ -17951,11 +17950,15 @@ diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.
+ return 0;
+ }
+
-+ /* calculate rate */
-+ rate = sb_clock_rate(pll_type, n, m);
++ if (BCMINIT(sb_chip)(sbh) == BCM5365_DEVICE_ID) {
++ rate = 100000000;
++ } else {
++ /* calculate rate */
++ rate = sb_clock_rate(pll_type, n, m);
++ if (pll_type == PLL_TYPE3)
++ rate = rate / 2;
++ }
+
-+ if (pll_type == PLL_TYPE3)
-+ rate = rate / 2;
+
+ /* switch back to previous core */
+ sb_setcoreidx(sbh, idx);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 17:42:32 +0000