diff options
| -rw-r--r-- | target/linux/ramips/patches-3.8/0130-GPIO-MIPS-ralink-adds-ralink-gpio-support.patch | 48 |
1 files changed, 32 insertions, 16 deletions
diff --git a/target/linux/ramips/patches-3.8/0130-GPIO-MIPS-ralink-adds-ralink-gpio-support.patch b/target/linux/ramips/patches-3.8/0130-GPIO-MIPS-ralink-adds-ralink-gpio-support.patch index 6f448882b..e3eeae9e8 100644 --- a/target/linux/ramips/patches-3.8/0130-GPIO-MIPS-ralink-adds-ralink-gpio-support.patch +++ b/target/linux/ramips/patches-3.8/0130-GPIO-MIPS-ralink-adds-ralink-gpio-support.patch @@ -17,9 +17,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org> create mode 100644 arch/mips/include/asm/mach-ralink/gpio.h create mode 100644 drivers/gpio/gpio-ralink.c ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -449,6 +449,7 @@ config RALINK +Index: linux-3.8.11/arch/mips/Kconfig +=================================================================== +--- linux-3.8.11.orig/arch/mips/Kconfig 2013-05-04 13:20:48.399042973 +0200 ++++ linux-3.8.11/arch/mips/Kconfig 2013-05-04 13:20:54.963043258 +0200 +@@ -449,6 +449,7 @@ select SYS_HAS_EARLY_PRINTK select HAVE_MACH_CLKDEV select CLKDEV_LOOKUP @@ -27,8 +29,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org> config SGI_IP22 bool "SGI IP22 (Indy/Indigo2)" ---- /dev/null -+++ b/arch/mips/include/asm/mach-ralink/gpio.h +Index: linux-3.8.11/arch/mips/include/asm/mach-ralink/gpio.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.8.11/arch/mips/include/asm/mach-ralink/gpio.h 2013-05-04 13:20:54.963043258 +0200 @@ -0,0 +1,24 @@ +/* + * Ralink SoC GPIO API support @@ -54,9 +58,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +#define gpio_to_irq __gpio_to_irq + +#endif /* __ASM_MACH_RALINK_GPIO_H */ ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -201,6 +201,12 @@ config GPIO_PXA +Index: linux-3.8.11/drivers/gpio/Kconfig +=================================================================== +--- linux-3.8.11.orig/drivers/gpio/Kconfig 2013-05-04 13:20:48.399042973 +0200 ++++ linux-3.8.11/drivers/gpio/Kconfig 2013-05-04 13:20:54.963043258 +0200 +@@ -201,6 +201,12 @@ help Say yes here to support the PXA GPIO device @@ -69,9 +75,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org> config GPIO_SPEAR_SPICS bool "ST SPEAr13xx SPI Chip Select as GPIO support" depends on PLAT_SPEAR ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -54,6 +54,7 @@ obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf85 +Index: linux-3.8.11/drivers/gpio/Makefile +=================================================================== +--- linux-3.8.11.orig/drivers/gpio/Makefile 2013-05-04 13:20:48.399042973 +0200 ++++ linux-3.8.11/drivers/gpio/Makefile 2013-05-04 13:20:54.963043258 +0200 +@@ -54,6 +54,7 @@ obj-$(CONFIG_GPIO_PCH) += gpio-pch.o obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o @@ -79,9 +87,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org> obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o ---- /dev/null -+++ b/drivers/gpio/gpio-ralink.c -@@ -0,0 +1,176 @@ +Index: linux-3.8.11/drivers/gpio/gpio-ralink.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.8.11/drivers/gpio/gpio-ralink.c 2013-05-06 11:39:24.816485479 +0200 +@@ -0,0 +1,182 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published @@ -189,6 +199,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + struct ralink_gpio_chip *gc; + const __be32 *ngpio; ++ const __be32 *gpiobase; + + if (!res) { + dev_err(&pdev->dev, "failed to find resource\n"); @@ -218,17 +229,22 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + return -EINVAL; + } + -+ spin_lock_init(&gc->lock); ++ gpiobase = of_get_property(np, "ralink,gpio-base", NULL); ++ if (gpiobase) ++ gc->chip.base = be32_to_cpu(*gpiobase); ++ else ++ gc->chip.base = -1; + + gc->chip.label = dev_name(&pdev->dev); + gc->chip.of_node = np; -+ gc->chip.base = -1; + gc->chip.ngpio = be32_to_cpu(*ngpio); + gc->chip.direction_input = ralink_gpio_direction_input; + gc->chip.direction_output = ralink_gpio_direction_output; + gc->chip.get = ralink_gpio_get; + gc->chip.set = ralink_gpio_set; + ++ spin_lock_init(&gc->lock); ++ + /* set polarity to low for all lines */ + rt_gpio_w32(gc, GPIO_REG_POL, 0); + |