diff options
| author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-06-11 07:18:05 +0000 |
|---|---|---|
| committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-06-11 07:18:05 +0000 |
| commit | a03c01b418c13c8b3aad734633caa9c8009a525e (patch) | |
| tree | 0ab536325ee73f5200a8d865e9c6b82b7e642e93 /target | |
| parent | e92b5b28a03e12c400f4a6772154428cb0a6a3e7 (diff) | |
[ar71xx] flush more register writings
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16415 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/irq.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c index 797e6f81a..7d204fd66 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c @@ -113,6 +113,9 @@ static void ar71xx_gpio_irq_unmask(unsigned int irq) irq -= AR71XX_GPIO_IRQ_BASE; ar71xx_gpio_wr(GPIO_REG_INT_ENABLE, ar71xx_gpio_rr(GPIO_REG_INT_ENABLE) | (1 << irq)); + + /* flush write */ + ar71xx_gpio_rr(GPIO_REG_INT_ENABLE); } static void ar71xx_gpio_irq_mask(unsigned int irq) @@ -120,6 +123,9 @@ static void ar71xx_gpio_irq_mask(unsigned int irq) irq -= AR71XX_GPIO_IRQ_BASE; ar71xx_gpio_wr(GPIO_REG_INT_ENABLE, ar71xx_gpio_rr(GPIO_REG_INT_ENABLE) & ~(1 << irq)); + + /* flush write */ + ar71xx_gpio_rr(GPIO_REG_INT_ENABLE); } #if 0 @@ -211,6 +217,9 @@ static void ar71xx_misc_irq_unmask(unsigned int irq) irq -= AR71XX_MISC_IRQ_BASE; ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE) | (1 << irq)); + + /* flush write */ + ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE); } static void ar71xx_misc_irq_mask(unsigned int irq) @@ -218,6 +227,9 @@ static void ar71xx_misc_irq_mask(unsigned int irq) irq -= AR71XX_MISC_IRQ_BASE; ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE) & ~(1 << irq)); + + /* flush write */ + ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE); } struct irq_chip ar71xx_misc_irq_chip = { |