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authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-08-02 09:54:28 +0000
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-08-02 09:54:28 +0000
commit58aa6ee58f5b456acf9c5d72f567cd7fdffa1db8 (patch)
tree4bf83da850dddc95874103181640f0c5a6133635 /target
parent08700f9817cfae410cea6f58a35bb914288aa0f7 (diff)
ar71xx: init switch hw_reset on the TL-WR1043ND board
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32944 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c
index e789b402b..61aeb52d0 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c
@@ -10,7 +10,9 @@
#include <linux/platform_device.h>
#include <linux/rtl8366.h>
+
#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
#include "dev-eth.h"
#include "dev-m25p80.h"
@@ -81,9 +83,18 @@ static struct gpio_keys_button tl_wr1043nd_gpio_keys[] __initdata = {
}
};
+static void tl_wr1043nd_rtl8366rb_hw_reset(bool active)
+{
+ if (active)
+ ath79_device_reset_set(AR71XX_RESET_GE0_PHY);
+ else
+ ath79_device_reset_clear(AR71XX_RESET_GE0_PHY);
+}
+
static struct rtl8366_platform_data tl_wr1043nd_rtl8366rb_data = {
- .gpio_sda = TL_WR1043ND_GPIO_RTL8366_SDA,
- .gpio_sck = TL_WR1043ND_GPIO_RTL8366_SCK,
+ .gpio_sda = TL_WR1043ND_GPIO_RTL8366_SDA,
+ .gpio_sck = TL_WR1043ND_GPIO_RTL8366_SCK,
+ .hw_reset = tl_wr1043nd_rtl8366rb_hw_reset,
};
static struct platform_device tl_wr1043nd_rtl8366rb_device = {
@@ -99,6 +110,8 @@ static void __init tl_wr1043nd_setup(void)
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
+ tl_wr1043nd_rtl8366rb_hw_reset(true);
+
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;