diff options
author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2011-03-27 19:19:57 +0000 |
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committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2011-03-27 19:19:57 +0000 |
commit | 5045f0c4dada84278362a62d9ce4187467487422 (patch) | |
tree | bceb63da482ac47cb5a1d92a9b13af6c4faf2c66 /target/linux | |
parent | 8e5950efc511109ddec21ade83a11461e98a5088 (diff) |
ramips: move GPIO definitions into a separate header file
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26325 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux')
5 files changed, 52 insertions, 63 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h index 8f058c88c..939062b49 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h @@ -16,7 +16,6 @@ void ramips_intc_irq_init(unsigned intc_base, unsigned irq, unsigned irq_base); u32 ramips_intc_get_status(void); void ramips_soc_setup(void); -void ramips_gpio_init(void); void ramips_early_serial_setup(int line, unsigned base, unsigned freq, unsigned irq); diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/ramips_gpio.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/ramips_gpio.h new file mode 100644 index 000000000..32fc7a740 --- /dev/null +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/ramips_gpio.h @@ -0,0 +1,48 @@ +/* + * Ralink SoC specific GPIO support + * + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef _RAMIPS_GPIO_H +#define _RAMIPS_GPIO_H + +#include <linux/gpio.h> +#include <linux/spinlock.h> + +enum ramips_gpio_reg { + RAMIPS_GPIO_REG_INT = 0, /* Interrupt status */ + RAMIPS_GPIO_REG_EDGE, + RAMIPS_GPIO_REG_RENA, + RAMIPS_GPIO_REG_FENA, + RAMIPS_GPIO_REG_DATA, + RAMIPS_GPIO_REG_DIR, /* Direction, 0:in, 1: out */ + RAMIPS_GPIO_REG_POL, /* Polarity, 0: normal, 1: invert */ + RAMIPS_GPIO_REG_SET, + RAMIPS_GPIO_REG_RESET, + RAMIPS_GPIO_REG_TOGGLE, + RAMIPS_GPIO_REG_MAX +}; + +struct ramips_gpio_chip { + struct gpio_chip chip; + unsigned long map_base; + unsigned long map_size; + u8 regs[RAMIPS_GPIO_REG_MAX]; + + spinlock_t lock; + void __iomem *regs_base; +}; + +struct ramips_gpio_data { + unsigned int num_chips; + struct ramips_gpio_chip *chips; +}; + +int ramips_gpio_init(struct ramips_gpio_data *data); + +#endif /* _RAMIPS_GPIO_H */ diff --git a/target/linux/ramips/files/arch/mips/ralink/common/gpio.c b/target/linux/ramips/files/arch/mips/ralink/common/gpio.c index 81c3a1f0d..ebaceead0 100644 --- a/target/linux/ramips/files/arch/mips/ralink/common/gpio.c +++ b/target/linux/ramips/files/arch/mips/ralink/common/gpio.c @@ -10,68 +10,10 @@ #include <linux/init.h> #include <linux/io.h> -#include <linux/spinlock.h> -#include <linux/gpio.h> +#include <asm/mach-ralink/ramips_gpio.h> #include <ralink_soc.h> -#define GPIO0_REG_INT 0x00 -#define GPIO0_REG_EDGE 0x04 -#define GPIO0_REG_RENA 0x08 -#define GPIO0_REG_FENA 0x0c -#define GPIO0_REG_DATA 0x20 -#define GPIO0_REG_DIR 0x24 -#define GPIO0_REG_POL 0x28 -#define GPIO0_REG_SET 0x2c -#define GPIO0_REG_RESET 0x30 -#define GPIO0_REG_TOGGLE 0x34 - -#define GPIO1_REG_INT 0x38 -#define GPIO1_REG_EDGE 0x3c -#define GPIO1_REG_RENA 0x40 -#define GPIO1_REG_FENA 0x44 -#define GPIO1_REG_DATA 0x48 -#define GPIO1_REG_DIR 0x4c -#define GPIO1_REG_POL 0x50 -#define GPIO1_REG_SET 0x54 -#define GPIO1_REG_RESET 0x58 -#define GPIO1_REG_TOGGLE 0x5c - -#define GPIO2_REG_INT 0x60 -#define GPIO2_REG_EDGE 0x64 -#define GPIO2_REG_RENA 0x68 -#define GPIO2_REG_FENA 0x6c -#define GPIO2_REG_DATA 0x70 -#define GPIO2_REG_DIR 0x74 -#define GPIO2_REG_POL 0x78 -#define GPIO2_REG_SET 0x7c -#define GPIO2_REG_RESET 0x80 -#define GPIO2_REG_TOGGLE 0x84 - -enum ramips_pio_reg { - RAMIPS_GPIO_REG_INT, /* Interrupt status */ - RAMIPS_GPIO_REG_EDGE, - RAMIPS_GPIO_REG_RENA, - RAMIPS_GPIO_REG_FENA, - RAMIPS_GPIO_REG_DATA, - RAMIPS_GPIO_REG_DIR, /* Direction, 0:in, 1: out */ - RAMIPS_GPIO_REG_POL, /* Polarity, 0: normal, 1: invert */ - RAMIPS_GPIO_REG_SET, - RAMIPS_GPIO_REG_RESET, - RAMIPS_GPIO_REG_TOGGLE, - RAMIPS_GPIO_REG_MAX -}; - -struct ramips_gpio_chip { - struct gpio_chip chip; - u8 regs[RAMIPS_GPIO_REG_MAX]; - unsigned long map_base; - unsigned long map_size; - - spinlock_t lock; - void __iomem *regs_base; -}; - static inline struct ramips_gpio_chip *to_ramips_gpio(struct gpio_chip *chip) { struct ramips_gpio_chip *rg; diff --git a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c index 467a637e4..c87a36029 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c @@ -1,7 +1,7 @@ /* * Ralink RT288x SoC specific setup * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> + * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> * * Parts of this file are based on Ralink's 2.6.21 BSP @@ -14,9 +14,9 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/module.h> -#include <linux/gpio.h> #include <asm/mach-ralink/common.h> +#include <asm/mach-ralink/ramips_gpio.h> #include <asm/mach-ralink/rt288x.h> #include <asm/mach-ralink/rt288x_regs.h> diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c index 0beeaa0e5..70f548a11 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c @@ -14,9 +14,9 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/module.h> -#include <linux/gpio.h> #include <asm/mach-ralink/common.h> +#include <asm/mach-ralink/ramips_gpio.h> #include <asm/mach-ralink/rt305x.h> #include <asm/mach-ralink/rt305x_regs.h> |