[ubicom32]: move new files out from platform support patch

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19815 3c298f89-4303-0410-b956-a3cf2f4a3e73

3 files changed, 2917 insertions, 0 deletions

diff --git a/target/linux/ubicom32/files/drivers/serial/ubi32_mailbox.c b/target/linux/ubicom32/files/drivers/serial/ubi32_mailbox.c
new file mode 100644
index 000000000..fc0d6d21b
--- /dev/null
+++ b/target/linux/ubicom32/files/drivers/serial/ubi32_mailbox.c
@@ -0,0 +1,928 @@
+/*
+ * drivers/serial/ubi32_mailbox.c
+ *   Ubicom32 On-Chip Mailbox Driver
+ *
+ * (C) Copyright 2009, Ubicom, Inc.
+ *
+ * This file is part of the Ubicom32 Linux Kernel Port.
+ *
+ * The Ubicom32 Linux Kernel Port is free software: you can redistribute
+ * it and/or modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation, either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * The Ubicom32 Linux Kernel Port is distributed in the hope that it
+ * will be useful, but WITHOUT ANY WARRANTY; without even the implied
+ * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+ * the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Ubicom32 Linux Kernel Port.  If not,
+ * see <http://www.gnu.org/licenses/>.
+ *
+ * Ubicom32 implementation derived from (with many thanks):
+ *   arch/m68knommu
+ *   arch/blackfin
+ *   arch/parisc
+ */
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/sysrq.h>
+#include <linux/platform_device.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+
+#include <asm/ip5000.h>
+
+#define SERIAL_UBICOM_BAUDRATE	115200
+#define SERIAL_UBICOM_DATA_BIT	8	/* Fixed parameter - do not change */
+#define SERIAL_UBICOM_PAR_BIT	0	/* Fixed parameter - do not change */
+#define SERIAL_UBICOM_STOP_BIT	1	/* Fixed parameter - do not change */
+
+/* UART name and device definitions */
+#define UBI32_MAILBOX_NAME	"ttyUM" // XXX
+#define UBI32_MAILBOX_MAJOR	207 // XXX
+#define UBI32_MAILBOX_MINOR	64
+
+#define PORT_UBI32_MAILBOX	1235
+#define NR_PORTS 1
+
+#define get_sclk() 0
+
+struct ubi32_mailbox_port {
+	struct uart_port port;
+	/*
+	 * NOTE (rkeller):
+	 * the uart port is wrapped in another structure in case we need to hold more state than
+	 * what we can hold in the uart_port.
+	 * Not sure if we need this, I took over the concept from the blackfin driver.
+	 */
+} ubi32_mailbox_ports[NR_PORTS];
+
+struct ubi32_mailbox_resource {
+	int uart_base_addr;
+	int uart_irq;
+} ubi32_mailbox_resource[NR_PORTS] = {
+	/*
+	 * uart_base_addr has to be non-NULL because it is put in the uart_port membase.
+	 * If membase if null the kernel skips the configuration and our port_type never gets set.
+	 */
+	{ISD_MAILBOX_BASE, ISD_MAILBOX_INT}
+};
+
+static volatile struct ubicom32_isd_mailbox {
+	volatile u32_t in;
+	volatile u32_t out;
+	volatile u32_t status;
+} *ubi32_mailbox = (struct ubicom32_isd_mailbox *)ISD_MAILBOX_BASE;
+
+static void ubi32_mailbox_tx_chars(struct ubi32_mailbox_port *uart);
+
+static void ubi32_mailbox_mctrl_check(struct ubi32_mailbox_port *uart);
+
+#define TRUE 1
+#define FALSE 0
+
+static int mailbox_console_flg = TRUE;
+static int num_timeouts = 0;
+
+/*
+ * dummy functions and defined to be able to compile the Blackfin code
+ */
+#define UART_GET_LSR(port) (1)
+#define UART_PUT_LSR(port, bits)
+#define UART_CLEAR_LSR(port) (1)
+#define TEMT 1
+#define TFI 1
+#define BI 1
+#define PE 1
+#define OE 1
+#define FE 1
+#define THRE 1
+#define DR 1
+#define UART_GET_LCR(port) (1)
+#define UART_PUT_LCR(port, bits)
+#define SB 1
+#define STB 1
+#define PEN 1
+#define EPS 1
+#define STP 1
+#define WLS(n) 0
+#define UART_GET_IER(port) (1)
+#define UART_SET_IER(port, bits)
+#define UART_CLEAR_IER(port, bits)
+#define ETBEI 0
+#define ERBFI 0
+#define UART_GET_CHAR(port) ubi32_mailbox_get_char()
+#define UART_PUT_CHAR(port, ch) ubi32_mailbox_put_char(ch)
+#define SSYNC()
+#define UART_GET_DLL(port) 0
+#define UART_PUT_DLL(port, ch)
+#define UART_GET_DLH(port) 0
+#define UART_PUT_DLH(port, ch)
+#define UART_GET_GCTL(port) (0)
+#define UART_PUT_GCTL(port, ch)
+#define UCEN 1
+
+/*
+ * ubi32_mailbox_get_char_avail()
+ */
+static int ubi32_mailbox_get_char_avail(void)
+{
+	return !(ubi32_mailbox->status & ISD_MAILBOX_STATUS_IN_EMPTY);
+}
+
+/*
+ * ubi32_mailbox_get_char()
+ */
+static u32_t ubi32_mailbox_get_char(void)
+{
+	if (mailbox_console_flg == TRUE) {
+		/*
+		 * Mailbox console is connected.
+		 */
+		while (ubi32_mailbox->status & ISD_MAILBOX_STATUS_IN_EMPTY);
+		return ubi32_mailbox->in & 0xff;
+	}
+
+	/*
+	 * Mailbox console was not connected.
+	 */
+	if (ubi32_mailbox->status & ISD_MAILBOX_STATUS_IN_EMPTY) {
+		return 0xff;
+	}
+
+	/*
+	 * Mailbox console is connecting.
+	 */
+	mailbox_console_flg = TRUE;
+	num_timeouts = 0;
+	return ubi32_mailbox->in & 0xff;
+}
+
+#define MAILBOX_MAX_ATTEMPTS 1000000
+#define MAILBOX_MAX_TIMEOUTS 5
+/*
+ * ubi32_mailbox_put_char()
+ */
+static void ubi32_mailbox_put_char(u32_t v)
+{
+	/*
+	 * Wait to be able to output.
+	 */
+	u32_t num_attempts = 0;
+
+	if(mailbox_console_flg == TRUE) {
+		while(num_attempts++ < MAILBOX_MAX_ATTEMPTS) {
+			if(ubi32_mailbox->status & ISD_MAILBOX_STATUS_OUT_EMPTY) {
+				break;
+			}
+		}
+
+		/*
+		 * If timed out more than 5 times on send, mailbox console is disconnected now.
+		 */
+		if (num_attempts > MAILBOX_MAX_ATTEMPTS) {
+			if (num_timeouts++ > MAILBOX_MAX_TIMEOUTS) {
+				mailbox_console_flg = FALSE;
+			}
+		}
+	}
+
+	asm volatile(
+		"pipe_flush 0	\n\t"
+		"pipe_flush 0	\n\t"
+		"pipe_flush 0	\n\t"
+		"pipe_flush 0	\n\t"
+		"pipe_flush 0	\n\t"
+		"pipe_flush 0	\n\t"
+		"pipe_flush 0	\n\t"
+	);
+
+	ubi32_mailbox->out = v & 0xff;
+}
+
+static void ubi32_mailbox_hw_init(struct ubi32_mailbox_port *uart)
+{
+// NOTE: It does not do any good to do these here because we are running on the linux hardware thread,
+//	and these have to be called on the ldsr thread.
+//	ubicom32_clear_interrupt(ISD_MAILBOX_INT);
+//	ubicom32_enable_interrupt(ISD_MAILBOX_INT);
+}
+
+/*
+ * interrupts are disabled on entry
+ */
+static void ubi32_mailbox_stop_tx(struct uart_port *port)
+{
+//	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+//	struct circ_buf *xmit = &uart->port.info->xmit;
+
+	while (!(UART_GET_LSR(uart) & TEMT))
+		cpu_relax();
+
+	/* Clear TFI bit */
+	UART_PUT_LSR(uart, TFI);
+	UART_CLEAR_IER(uart, ETBEI);
+}
+
+/*
+ * port is locked and interrupts are disabled
+ */
+static void ubi32_mailbox_start_tx(struct uart_port *port)
+{
+	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+
+	UART_SET_IER(uart, ETBEI);
+
+	ubi32_mailbox_tx_chars(uart);
+}
+
+/*
+ * Interrupts are enabled
+ */
+static void ubi32_mailbox_stop_rx(struct uart_port *port)
+{
+//	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+	UART_CLEAR_IER(uart, ERBFI);
+}
+
+/*
+ * Set the modem control timer to fire immediately.
+ */
+static void ubi32_mailbox_enable_ms(struct uart_port *port)
+{
+}
+
+static void ubi32_mailbox_rx_chars(struct ubi32_mailbox_port *uart)
+{
+	struct uart_info *info = uart->port.info;
+	struct tty_struct *tty = info->port.tty;
+	unsigned int status, ch, flg;
+
+	status = 0; // XXX? UART_GET_LSR(uart);
+	UART_CLEAR_LSR(uart);
+
+	ch = UART_GET_CHAR(uart);
+
+	if(ch == 0xff)
+		return;
+
+	uart->port.icount.rx++;
+
+	if (status & BI) {
+		uart->port.icount.brk++;
+		if (uart_handle_break(&uart->port))
+			goto ignore_char;
+		status &= ~(PE | FE);
+	}
+	if (status & PE)
+		uart->port.icount.parity++;
+	if (status & OE)
+		uart->port.icount.overrun++;
+	if (status & FE)
+		uart->port.icount.frame++;
+
+	status &= uart->port.read_status_mask;
+
+	if (status & BI)
+		flg = TTY_BREAK;
+	else if (status & PE)
+		flg = TTY_PARITY;
+	else if (status & FE)
+		flg = TTY_FRAME;
+	else
+		flg = TTY_NORMAL;
+
+	if (uart_handle_sysrq_char(&uart->port, ch))
+		goto ignore_char;
+
+	uart_insert_char(&uart->port, status, OE, ch, flg);
+
+ ignore_char:
+	tty_flip_buffer_push(tty);
+}
+
+static void ubi32_mailbox_tx_chars(struct ubi32_mailbox_port *uart)
+{
+	struct circ_buf *xmit = &uart->port.info->xmit;
+
+	if (uart->port.x_char) {
+		UART_PUT_CHAR(uart, uart->port.x_char);
+		uart->port.icount.tx++;
+		uart->port.x_char = 0;
+	}
+	/*
+	 * Check the modem control lines before
+	 * transmitting anything.
+	 */
+	ubi32_mailbox_mctrl_check(uart);
+
+	if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
+		ubi32_mailbox_stop_tx(&uart->port);
+		return;
+	}
+
+	while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
+		UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
+		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+		uart->port.icount.tx++;
+		SSYNC();
+	}
+
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(&uart->port);
+
+	if (uart_circ_empty(xmit))
+		ubi32_mailbox_stop_tx(&uart->port);
+}
+
+static irqreturn_t ubi32_mailbox_isr(int irq, void *dev_id)
+{
+	struct ubi32_mailbox_port *uart = dev_id;
+
+	spin_lock(&uart->port.lock);
+
+	//XXX?while (UART_GET_LSR(uart) & DR)
+
+	/*
+	 * RX process
+	 */
+	while (ubi32_mailbox_get_char_avail()) {
+		ubi32_mailbox_rx_chars(uart);
+	}
+
+#if 0
+	/*
+	 * TX process
+	 */
+	if (this_uart.tx_in == this_uart.tx_out) {
+		UBICOM32_IO_PORT(SERIAL_UBICOM_PORT)->int_mask &= ~IO_PORTX_INT_SERDES_TXBE;
+	} else if (UBICOM32_IO_PORT(SERIAL_UBICOM_PORT)->int_status & IO_PORTX_INT_SERDES_TXBE) {
+		uart_ubicom32_send(this_uart.tx_buf[this_uart.tx_out & (SERIAL_UBICOM_BUF_SIZE - 1)]);
+		this_uart.tx_out++;
+		UBICOM32_IO_PORT(SERIAL_UBICOM_PORT)->int_mask |= IO_PORTX_INT_SERDES_TXBE;
+	}
+#endif
+
+	spin_unlock(&uart->port.lock);
+
+	return IRQ_HANDLED;
+}
+#if 0
+static irqreturn_t ubi32_mailbox_tx_int(int irq, void *dev_id)
+{
+	struct ubi32_mailbox_port *uart = dev_id;
+
+	spin_lock(&uart->port.lock);
+	if (UART_GET_LSR(uart) & THRE)
+		ubi32_mailbox_tx_chars(uart);
+	spin_unlock(&uart->port.lock);
+
+	return IRQ_HANDLED;
+}
+#endif
+
+/*
+ * Return TIOCSER_TEMT when transmitter is not busy.
+ */
+static unsigned int ubi32_mailbox_tx_empty(struct uart_port *port)
+{
+//	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+	unsigned short lsr;
+
+	lsr = UART_GET_LSR(uart);
+	if (lsr & TEMT)
+		return TIOCSER_TEMT;
+	else
+		return 0;
+}
+
+static unsigned int ubi32_mailbox_get_mctrl(struct uart_port *port)
+{
+		return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+}
+
+static void ubi32_mailbox_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+/*
+ * Handle any change of modem status signal since we were last called.
+ */
+static void ubi32_mailbox_mctrl_check(struct ubi32_mailbox_port *uart)
+{
+}
+
+/*
+ * Interrupts are always disabled.
+ */
+static void ubi32_mailbox_break_ctl(struct uart_port *port, int break_state)
+{
+//	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+	u16 lcr = UART_GET_LCR(uart);
+	if (break_state)
+		lcr |= SB;
+	else
+		lcr &= ~SB;
+	UART_PUT_LCR(uart, lcr);
+	SSYNC();
+}
+
+static int ubi32_mailbox_startup(struct uart_port *port)
+{
+	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+
+	if (request_irq(uart->port.irq, ubi32_mailbox_isr, IRQF_DISABLED,
+	     "UBI32_MAILBOX", uart)) {
+		printk(KERN_NOTICE "Unable to attach Ubicom32 SERDES interrupt\n");
+		return -EBUSY;
+	}
+
+	UART_SET_IER(uart, ERBFI);
+	return 0;
+}
+
+static void ubi32_mailbox_shutdown(struct uart_port *port)
+{
+	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+
+	free_irq(uart->port.irq, uart);
+}
+
+static void
+ubi32_mailbox_set_termios(struct uart_port *port, struct ktermios *termios,
+		   struct ktermios *old)
+{
+	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+	unsigned long flags;
+	unsigned int baud, quot;
+	unsigned short val, ier, lsr, lcr = 0;
+
+	switch (termios->c_cflag & CSIZE) {
+	case CS8:
+		lcr = WLS(8);
+		break;
+	case CS7:
+		lcr = WLS(7);
+		break;
+	case CS6:
+		lcr = WLS(6);
+		break;
+	case CS5:
+		lcr = WLS(5);
+		break;
+	default:
+		printk(KERN_ERR "%s: word lengh not supported\n",
+			__FUNCTION__);
+	}
+
+	if (termios->c_cflag & CSTOPB)
+		lcr |= STB;
+	if (termios->c_cflag & PARENB)
+		lcr |= PEN;
+	if (!(termios->c_cflag & PARODD))
+		lcr |= EPS;
+	if (termios->c_cflag & CMSPAR)
+		lcr |= STP;
+
+	port->read_status_mask = OE;
+	if (termios->c_iflag & INPCK)
+		port->read_status_mask |= (FE | PE);
+	if (termios->c_iflag & (BRKINT | PARMRK))
+		port->read_status_mask |= BI;
+
+	/*
+	 * Characters to ignore
+	 */
+	port->ignore_status_mask = 0;
+	if (termios->c_iflag & IGNPAR)
+		port->ignore_status_mask |= FE | PE;
+	if (termios->c_iflag & IGNBRK) {
+		port->ignore_status_mask |= BI;
+		/*
+		 * If we're ignoring parity and break indicators,
+		 * ignore overruns too (for real raw support).
+		 */
+		if (termios->c_iflag & IGNPAR)
+			port->ignore_status_mask |= OE;
+	}
+
+	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
+	quot = uart_get_divisor(port, baud);
+	spin_lock_irqsave(&uart->port.lock, flags);
+
+	do {
+		lsr = UART_GET_LSR(uart);
+	} while (!(lsr & TEMT));
+
+	/* Disable UART */
+	ier = UART_GET_IER(uart);
+	UART_CLEAR_IER(uart, 0xF);
+
+	UART_PUT_DLL(uart, quot & 0xFF);
+	SSYNC();
+	UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
+	SSYNC();
+
+	UART_PUT_LCR(uart, lcr);
+
+	/* Enable UART */
+	UART_SET_IER(uart, ier);
+
+	val = UART_GET_GCTL(uart);
+	val |= UCEN;
+	UART_PUT_GCTL(uart, val);
+
+	spin_unlock_irqrestore(&uart->port.lock, flags);
+}
+
+static const char *ubi32_mailbox_type(struct uart_port *port)
+{
+	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+
+	return uart->port.type == PORT_UBI32_MAILBOX ? "UBI32_MAILBOX" : NULL;
+}
+
+/*
+ * Release the memory region(s) being used by 'port'.
+ */
+static void ubi32_mailbox_release_port(struct uart_port *port)
+{
+}
+
+/*
+ * Request the memory region(s) being used by 'port'.
+ */
+static int ubi32_mailbox_request_port(struct uart_port *port)
+{
+	return 0;
+}
+
+/*
+ * Configure/autoconfigure the port.
+ */
+static void ubi32_mailbox_config_port(struct uart_port *port, int flags)
+{
+	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+
+	if (flags & UART_CONFIG_TYPE && ubi32_mailbox_request_port(&uart->port) == 0)
+		uart->port.type = PORT_UBI32_MAILBOX;
+}
+
+/*
+ * Verify the new serial_struct (for TIOCSSERIAL).
+ * The only change we allow are to the flags and type, and
+ * even then only between PORT_UBI32_MAILBOX and PORT_UNKNOWN
+ */
+static int
+ubi32_mailbox_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+	return 0;
+}
+
+static struct uart_ops ubi32_mailbox_pops = {
+	.tx_empty	= ubi32_mailbox_tx_empty,
+	.set_mctrl	= ubi32_mailbox_set_mctrl,
+	.get_mctrl	= ubi32_mailbox_get_mctrl,
+	.stop_tx	= ubi32_mailbox_stop_tx,
+	.start_tx	= ubi32_mailbox_start_tx,
+	.stop_rx	= ubi32_mailbox_stop_rx,
+	.enable_ms	= ubi32_mailbox_enable_ms,
+	.break_ctl	= ubi32_mailbox_break_ctl,
+	.startup	= ubi32_mailbox_startup,
+	.shutdown	= ubi32_mailbox_shutdown,
+	.set_termios	= ubi32_mailbox_set_termios,
+	.type		= ubi32_mailbox_type,
+	.release_port	= ubi32_mailbox_release_port,
+	.request_port	= ubi32_mailbox_request_port,
+	.config_port	= ubi32_mailbox_config_port,
+	.verify_port	= ubi32_mailbox_verify_port,
+};
+
+static void __init ubi32_mailbox_init_ports(void)
+{
+	static int first = 1;
+	int i;
+
+	if (!first)
+		return;
+	first = 0;
+
+	for (i = 0; i < NR_PORTS; i++) {
+		ubi32_mailbox_ports[i].port.uartclk   = get_sclk();
+		ubi32_mailbox_ports[i].port.ops       = &ubi32_mailbox_pops;
+		ubi32_mailbox_ports[i].port.line      = i;
+		ubi32_mailbox_ports[i].port.iotype    = UPIO_MEM;
+		ubi32_mailbox_ports[i].port.membase   =
+			(void __iomem *)ubi32_mailbox_resource[i].uart_base_addr;
+		ubi32_mailbox_ports[i].port.mapbase   =
+			ubi32_mailbox_resource[i].uart_base_addr;
+		ubi32_mailbox_ports[i].port.irq       =
+			ubi32_mailbox_resource[i].uart_irq;
+		ubi32_mailbox_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
+		spin_lock_init(&ubi32_mailbox_ports[i].port.lock);
+
+		ubi32_mailbox_hw_init(&ubi32_mailbox_ports[i]);
+	}
+
+}
+
+#ifdef CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE
+/*
+ * If the port was already initialised (eg, by a boot loader),
+ * try to determine the current setup.
+ */
+static void __init
+ubi32_mailbox_console_get_options(struct ubi32_mailbox_port *uart, int *baud,
+			   int *parity, int *bits)
+{
+	unsigned short status;
+
+	status = UART_GET_IER(uart) & (ERBFI | ETBEI);
+	if (status == (ERBFI | ETBEI)) {
+		/* ok, the port was enabled */
+		unsigned short lcr;
+		unsigned short dlh, dll;
+
+		lcr = UART_GET_LCR(uart);
+
+		*parity = 'n';
+		if (lcr & PEN) {
+			if (lcr & EPS)
+				*parity = 'e';
+			else
+				*parity = 'o';
+		}
+		switch (lcr & 0x03) {
+			case 0:	*bits = 5; break;
+			case 1:	*bits = 6; break;
+			case 2:	*bits = 7; break;
+			case 3:	*bits = 8; break;
+		}
+
+		dll = UART_GET_DLL(uart);
+		dlh = UART_GET_DLH(uart);
+
+		*baud = get_sclk() / (16*(dll | dlh << 8));
+	}
+	pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
+}
+#endif
+
+#if defined(CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+static struct uart_driver ubi32_mailbox_reg;
+
+static int __init
+ubi32_mailbox_console_setup(struct console *co, char *options)
+{
+	struct ubi32_mailbox_port *uart;
+# ifdef CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE
+	int baud = SERIAL_UBICOM_BAUDRATE;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+# endif
+
+	/*
+	 * Check whether an invalid uart number has been specified, and
+	 * if so, search for the first available port that does have
+	 * console support.
+	 */
+	if (co->index == -1 || co->index >= NR_PORTS)
+		co->index = 0;
+	uart = &ubi32_mailbox_ports[co->index];
+
+# ifdef CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE
+	if (options)
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+	else
+		ubi32_mailbox_console_get_options(uart, &baud, &parity, &bits);
+
+	//JB return uart_set_options(&uart->port, co, baud, parity, bits, flow);
+	return 0;
+# else
+	return 0;
+# endif
+}
+#endif /* defined (CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE) ||
+				 defined (CONFIG_EARLY_PRINTK) */
+
+#ifdef CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE
+static void ubi32_mailbox_console_putchar(struct uart_port *port, int ch)
+{
+//	struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
+	while (!(UART_GET_LSR(uart) & THRE))
+		barrier();
+	UART_PUT_CHAR(uart, ch);
+	SSYNC();
+}
+
+/*
+ * Interrupts are disabled on entering
+ */
+static void
+ubi32_mailbox_console_write(struct console *co, const char *s, unsigned int count)
+{
+	struct ubi32_mailbox_port *uart = &ubi32_mailbox_ports[co->index];
+	unsigned long flags = 0;
+
+	spin_lock_irqsave(&uart->port.lock, flags);
+	uart_console_write(&uart->port, s, count, ubi32_mailbox_console_putchar);
+	spin_unlock_irqrestore(&uart->port.lock, flags);
+
+}
+
+static struct console ubi32_mailbox_console = {
+	.name		= UBI32_MAILBOX_NAME,
+	.write		= ubi32_mailbox_console_write,
+	.device		= uart_console_device,
+	.setup		= ubi32_mailbox_console_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+	.data		= &ubi32_mailbox_reg,
+};
+
+static int __init ubi32_mailbox_console_init(void)
+{
+	ubi32_mailbox_init_ports();
+	register_console(&ubi32_mailbox_console);
+	return 0;
+}
+console_initcall(ubi32_mailbox_console_init);
+
+#define UBI32_MAILBOX_CONSOLE	&ubi32_mailbox_console
+#else
+#define UBI32_MAILBOX_CONSOLE	NULL
+#endif /* CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE */
+
+
+#ifdef CONFIG_EARLY_PRINTK
+static __init void ubi32_mailbox_early_putc(struct uart_port *port, int ch)
+{
+	UART_PUT_CHAR(uart, ch);
+}
+
+static __init void ubi32_mailbox_early_write(struct console *con, const char *s,
+					unsigned int n)
+{
+	struct ubi32_mailbox_port *uart = &ubi32_mailbox_ports[con->index];
+	unsigned int i;
+
+	for (i = 0; i < n; i++, s++) {
+		if (*s == '\n')
+			ubi32_mailbox_early_putc(&uart->port, '\r');
+		ubi32_mailbox_early_putc(&uart->port, *s);
+	}
+}
+
+static struct __init console ubi32_mailbox_early_console = {
+	.name = "early_UM",
+	.write = ubi32_mailbox_early_write,
+	.device = uart_console_device,
+	.flags = CON_PRINTBUFFER,
+	.setup = ubi32_mailbox_console_setup,
+	.index = -1,
+	.data  = &ubi32_mailbox_reg,
+};
+
+/*
+ * XXX Unused in our driver. Need to find out what the termios initialization is good/needed for.
+ */
+struct console __init *ubi32_mailbox_early_init(unsigned int port,
+						unsigned int cflag)
+{
+	struct ubi32_mailbox_port *uart;
+	struct ktermios t;
+
+	if (port == -1 || port >= NR_PORTS)
+		port = 0;
+	ubi32_mailbox_init_ports();
+	ubi32_mailbox_early_console.index = port;
+	uart = &ubi32_mailbox_ports[port];
+	t.c_cflag = cflag;
+	t.c_iflag = 0;
+	t.c_oflag = 0;
+	t.c_lflag = ICANON;
+	t.c_line = port;
+	ubi32_mailbox_set_termios(&uart->port, &t, &t);
+	return &ubi32_mailbox_early_console;
+}
+
+#endif /* CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE */
+
+static struct uart_driver ubi32_mailbox_reg = {
+	.owner			= THIS_MODULE,
+	.driver_name		= "ubi32_mailbox",
+	.dev_name		= UBI32_MAILBOX_NAME,
+	.major			= UBI32_MAILBOX_MAJOR,
+	.minor			= UBI32_MAILBOX_MINOR,
+	.nr			= NR_PORTS,
+	.cons			= UBI32_MAILBOX_CONSOLE,
+};
+
+static int ubi32_mailbox_suspend(struct platform_device *dev, pm_message_t state)
+{
+	struct ubi32_mailbox_port *uart = platform_get_drvdata(dev);
+
+	if (uart)
+		uart_suspend_port(&ubi32_mailbox_reg, &uart->port);
+
+	return 0;
+}
+
+static int ubi32_mailbox_resume(struct platform_device *dev)
+{
+	struct ubi32_mailbox_port *uart = platform_get_drvdata(dev);
+
+	if (uart)
+		uart_resume_port(&ubi32_mailbox_reg, &uart->port);
+
+	return 0;
+}
+
+static int ubi32_mailbox_probe(struct platform_device *dev)
+{
+	struct resource *res = dev->resource;
+	int i;
+
+	for (i = 0; i < dev->num_resources; i++, res++)
+		if (res->flags & IORESOURCE_MEM)
+			break;
+
+	if (i < dev->num_resources) {
+		for (i = 0; i < NR_PORTS; i++, res++) {
+			if (ubi32_mailbox_ports[i].port.mapbase != res->start)
+				continue;
+			ubi32_mailbox_ports[i].port.dev = &dev->dev;
+			uart_add_one_port(&ubi32_mailbox_reg, &ubi32_mailbox_ports[i].port);
+			platform_set_drvdata(dev, &ubi32_mailbox_ports[i]);
+		}
+	}
+
+	return 0;
+}
+
+static int ubi32_mailbox_remove(struct platform_device *pdev)
+{
+	struct ubi32_mailbox_port *uart = platform_get_drvdata(pdev);
+
+	platform_set_drvdata(pdev, NULL);
+
+	if (uart)
+		uart_remove_one_port(&ubi32_mailbox_reg, &uart->port);
+
+	return 0;
+}
+
+static struct platform_driver ubi32_mailbox_driver = {
+	.probe		= ubi32_mailbox_probe,
+	.remove		= ubi32_mailbox_remove,
+	.suspend	= ubi32_mailbox_suspend,
+	.resume		= ubi32_mailbox_resume,
+	.driver		= {
+		.name	= "ubi32-mbox",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init ubi32_mailbox_init(void)
+{
+	int ret;
+
+	pr_info("Serial: Ubicom32 mailbox serial driver.\n");
+
+	mailbox_console_flg = TRUE;
+	num_timeouts = 0;
+	ubi32_mailbox_init_ports();
+
+	ret = uart_register_driver(&ubi32_mailbox_reg);
+	if (ret == 0) {
+		ret = platform_driver_register(&ubi32_mailbox_driver);
+		if (ret) {
+			pr_debug("uart register failed\n");
+			uart_unregister_driver(&ubi32_mailbox_reg);
+		}
+	}
+
+	/*
+	 * XXX HACK: currently probe does not get called, but the port needs to be added to work.
+	 */
+	uart_add_one_port(&ubi32_mailbox_reg, &ubi32_mailbox_ports[0].port);
+	return ret;
+}
+
+static void __exit ubi32_mailbox_exit(void)
+{
+	platform_driver_unregister(&ubi32_mailbox_driver);
+	uart_unregister_driver(&ubi32_mailbox_reg);
+}
+
+module_init(ubi32_mailbox_init);
+module_exit(ubi32_mailbox_exit);
+
+MODULE_ALIAS_CHARDEV_MAJOR(UBI32_MAILBOX_MAJOR);
+MODULE_ALIAS("platform:ubi32_mailbox");
diff --git a/target/linux/ubicom32/files/drivers/serial/ubi32_serdes.c b/target/linux/ubicom32/files/drivers/serial/ubi32_serdes.c
new file mode 100644
index 000000000..79037da49
--- /dev/null
+++ b/target/linux/ubicom32/files/drivers/serial/ubi32_serdes.c
@@ -0,0 +1,817 @@
+/*
+ * drivers/serial/ubi32_serdes.c
+ *   Ubicom32 On-Chip Serial Driver
+ *
+ * (C) Copyright 2009, Ubicom, Inc.
+ *
+ * This file is part of the Ubicom32 Linux Kernel Port.
+ *
+ * The Ubicom32 Linux Kernel Port is free software: you can redistribute
+ * it and/or modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation, either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * The Ubicom32 Linux Kernel Port is distributed in the hope that it
+ * will be useful, but WITHOUT ANY WARRANTY; without even the implied
+ * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+ * the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Ubicom32 Linux Kernel Port.  If not,
+ * see <http://www.gnu.org/licenses/>.
+ *
+ * Ubicom32 implementation derived from (with many thanks):
+ *   arch/m68knommu
+ *   arch/blackfin
+ *   arch/parisc
+ */
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/sysrq.h>
+#include <linux/platform_device.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+
+#include <asm/ip5000.h>
+#include <asm/ubicom32suart.h>
+
+
+#define SERIAL_UBICOM_PIN_RXD	(1 << 0)
+#define SERIAL_UBICOM_PIN_TXD	(1 << 6)
+#define SERIAL_UBICOM_CTL0	0x8b300000
+#define SERIAL_UBICOM_CTL1	0x00000009
+
+#define SERIAL_UBICOM_DATA_BIT	8	/* Fixed parameter - do not change */
+#define SERIAL_UBICOM_PAR_BIT	0	/* Fixed parameter - do not change */
+#define SERIAL_UBICOM_STOP_BIT	1	/* Fixed parameter - do not change */
+
+/* UART name and device definitions */
+#define UBI32_SERDES_NAME	"ttyUS" // XXX
+#define UBI32_SERDES_MAJOR	206 // XXX
+#define UBI32_SERDES_MINOR	64 // XXX
+
+#define PORT_UBI32_SERDES	1234
+#define NR_PORTS 1
+
+struct uart_port ubi32_serdes_ports[NR_PORTS];
+
+struct ubi32_serdes_resource {
+	void *uart_base_addr;
+	int uart_irq;
+	int uart_clock;
+} ubi32_serdes_resource[NR_PORTS] = {
+	/*
+	 * Get params from kernel command line (required for early printk)
+	 * or from platform resources.
+	 */
+	{0, 0, 0}
+};
+
+/*
+ * Can get overridden by 'serdes=' kernel command line.
+ */
+static int ubi32_serdes_default_baud_rate = 115200;
+
+
+#define IO_PORT(port) ((struct ubicom32_io_port *)port->membase)
+#define IO_PORT_INT_STATUS(port) (IO_PORT(port)->int_status)
+#define IO_PORT_INT_MASK(port) (IO_PORT(port)->int_mask)
+#define IO_PORT_INT_CLR(port) (IO_PORT(port)->int_clr)
+
+
+/*
+ * ubi32_serdes_get_char()
+ */
+static u8_t ubi32_serdes_get_char(struct ubicom32_io_port *io_port)
+{
+	/*
+	 * Read from hardware (forced 32-bit atomic read).
+	 */
+	u32_t data = 0;
+
+	if ( io_port ) {
+		io_port->int_clr = IO_PORTX_INT_SERDES_RXBF;
+		asm volatile (
+			"move.4		%0, %1		\n\t"
+			: "=r" (data)
+			: "m" (*(u32_t *)&(io_port->rx_fifo))
+			);
+	}
+
+	return (u8_t)(data & 0x000000ff);
+}
+
+/*
+ * ubi32_serdes_put_char()
+ */
+static void ubi32_serdes_put_char(struct ubicom32_io_port *io_port, u8_t c)
+{
+	u32_t data = 0x0000fe00 | (c << 1);
+
+	if ( io_port ) {
+		/*
+		 * Fixed data format:
+		 * [LSB]1 start bit - 8 data bits - no parity - 1 stop bit[MSB]
+		 */
+		io_port->int_clr = IO_PORTX_INT_SERDES_TXBE;
+		io_port->ctl2 = data;
+		io_port->int_set = IO_PORTX_INT_SERDES_TXBUF_VALID;
+	}
+}
+
+static void ubi32_serdes_hw_init(struct uart_port *port, int baud)
+{
+	struct ubicom32_io_port *io_port = IO_PORT(port);
+
+	if ( io_port ) {
+		/*
+		 * Put port functions 1-4 into reset state.
+		 * Function 0 (GPIO) does not need or have a reset bit.
+		 *
+		 * Select SERDES function for restart below.
+		 */
+		io_port->function =
+			IO_FUNC_FUNCTION_RESET(1) | IO_FUNC_FUNCTION_RESET(2) |
+			IO_FUNC_FUNCTION_RESET(3) | IO_FUNC_FUNCTION_RESET(4) |
+			IO_PORTX_FUNC_SERDES;
+
+		/*
+		 * Configure SERDES baudrate
+		 */
+		if ( baud == 0 ) {
+			baud = ubi32_serdes_default_baud_rate;
+		}
+
+		io_port->ctl0 =
+			SERIAL_UBICOM_CTL0 |
+			((port->uartclk / (16 * baud)) - 1);
+
+		io_port->ctl1 =
+			SERIAL_UBICOM_CTL1;
+
+		/*
+		 * don't interrupt until startup and start_tx
+		 */
+		io_port->int_mask = 0;
+
+		/*
+		 * Set TXD pin output, RXD input and prevent GPIO
+		 * override on the TXD & RXD pins
+		 */
+		io_port->gpio_ctl &= ~SERIAL_UBICOM_PIN_RXD;
+		io_port->gpio_ctl |= SERIAL_UBICOM_PIN_TXD;
+		io_port->gpio_mask &= ~(SERIAL_UBICOM_PIN_RXD | SERIAL_UBICOM_PIN_TXD);
+
+		/*
+		 * Restart (un-reset) the port's SERDES function.
+		 */
+		io_port->function &= ~(IO_FUNC_FUNCTION_RESET(IO_PORTX_FUNC_SERDES));
+	}
+}
+
+#define ULITE_STATUS_RXVALID IO_PORTX_INT_SERDES_RXBF
+#define ULITE_STATUS_OVERRUN 0
+#define ULITE_STATUS_FRAME 0
+#define ULITE_STATUS_PARITY 0
+#define ULITE_STATUS_TXEMPTY IO_PORTX_INT_SERDES_TXBE
+#define ULITE_STATUS_TXFULL 0
+
+static int ubi32_serdes_receive(struct uart_port *port, int stat)
+{
+	struct tty_struct *tty = port->info->port.tty;
+	unsigned char ch = 0;
+	char flag = TTY_NORMAL;
+
+	if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
+		     | ULITE_STATUS_FRAME)) == 0)
+		return 0;
+
+	/* stats */
+	if (stat & ULITE_STATUS_RXVALID) {
+		port->icount.rx++;
+		ch = ubi32_serdes_get_char((struct ubicom32_io_port *)port->membase);
+
+		if (stat & ULITE_STATUS_PARITY)
+			port->icount.parity++;
+	}
+
+	if (stat & ULITE_STATUS_OVERRUN)
+		port->icount.overrun++;
+
+	if (stat & ULITE_STATUS_FRAME)
+		port->icount.frame++;
+
+
+	/* drop byte with parity error if IGNPAR specificed */
+	if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
+		stat &= ~ULITE_STATUS_RXVALID;
+
+	stat &= port->read_status_mask;
+
+	if (stat & ULITE_STATUS_PARITY)
+		flag = TTY_PARITY;
+
+	stat &= ~port->ignore_status_mask;
+
+	if (stat & ULITE_STATUS_RXVALID)
+		tty_insert_flip_char(tty, ch, flag);
+
+	if (stat & ULITE_STATUS_FRAME)
+		tty_insert_flip_char(tty, 0, TTY_FRAME);
+
+	if (stat & ULITE_STATUS_OVERRUN)
+		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
+
+	return 1;
+}
+
+/*
+ * interrupts are disabled on entry
+ */
+static void ubi32_serdes_stop_tx(struct uart_port *port)
+{
+	IO_PORT_INT_MASK(port) = IO_PORT_INT_MASK(port) & ~IO_PORTX_INT_SERDES_TXBE;
+}
+
+static int ubi32_serdes_transmit(struct uart_port *port, int stat)
+{
+	struct circ_buf *xmit  = &port->info->xmit;
+
+	if (!(stat & IO_PORTX_INT_SERDES_TXBE))
+		return 0;
+
+	if (port->x_char) {
+		ubi32_serdes_put_char(IO_PORT(port), port->x_char);
+		port->x_char = 0;
+		port->icount.tx++;
+		return 1;
+	}
+
+	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+		ubi32_serdes_stop_tx(port);
+		return 0;
+	}
+
+	ubi32_serdes_put_char(IO_PORT(port), xmit->buf[xmit->tail]);
+	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
+	port->icount.tx++;
+
+	/* wake up */
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(port);
+
+	if (uart_circ_empty(xmit))
+		ubi32_serdes_stop_tx(port);
+
+	return 1;
+}
+
+/*
+ * port is locked and interrupts are disabled
+ */
+static void ubi32_serdes_start_tx(struct uart_port *port)
+{
+	IO_PORT_INT_MASK(port) = IO_PORT_INT_MASK(port) | IO_PORTX_INT_SERDES_TXBE;
+	ubi32_serdes_transmit(port, IO_PORT_INT_STATUS(port));
+}
+
+/*
+ * Interrupts are enabled
+ */
+static void ubi32_serdes_stop_rx(struct uart_port *port)
+{
+	/* don't forward any more data (like !CREAD) */
+	port->ignore_status_mask = IO_PORTX_INT_SERDES_RXBF;
+}
+
+/*
+ * Set the modem control timer to fire immediately.
+ */
+static void ubi32_serdes_enable_ms(struct uart_port *port)
+{
+	/* N/A */
+}
+
+static irqreturn_t ubi32_serdes_isr(int irq, void *dev_id)
+{
+	struct uart_port *port = dev_id;
+	int busy;
+
+	spin_lock(&port->lock);
+
+	do {
+		int stat = IO_PORT_INT_STATUS(port);
+		busy  = ubi32_serdes_receive(port, stat);
+		busy |= ubi32_serdes_transmit(port, stat);
+	} while (busy);
+
+	tty_flip_buffer_push(port->info->port.tty);
+
+	spin_unlock(&port->lock);
+
+	return IRQ_HANDLED;
+}
+
+/*
+ * Return TIOCSER_TEMT when transmitter is not busy.
+ */
+static unsigned int ubi32_serdes_tx_empty(struct uart_port *port)
+{
+	unsigned long flags;
+	unsigned int ret;
+
+	spin_lock_irqsave(&port->lock, flags);
+	ret = IO_PORT_INT_STATUS(port);
+	spin_unlock_irqrestore(&port->lock, flags);
+
+	return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
+}
+
+static unsigned int ubi32_serdes_get_mctrl(struct uart_port *port)
+{
+	return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+}
+
+static void ubi32_serdes_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+	/* N/A */
+}
+
+/*
+ * Interrupts are always disabled.
+ */
+static void ubi32_serdes_break_ctl(struct uart_port *port, int break_state)
+{
+	/* N/A */
+}
+
+static int ubi32_serdes_startup(struct uart_port *port)
+{
+	if (request_irq(port->irq, ubi32_serdes_isr, IRQF_DISABLED,
+	     "UBI32_SERDES", port)) {
+		printk(KERN_NOTICE "Unable to attach port interrupt\n");
+		return -EBUSY;
+	}
+
+	IO_PORT_INT_CLR(port) = IO_PORTX_INT_SERDES_RXBF;
+	IO_PORT_INT_MASK(port) = IO_PORTX_INT_SERDES_RXBF;
+	return 0;
+}
+
+static void ubi32_serdes_shutdown(struct uart_port *port)
+{
+	struct ubi32_serdes_port *uart = (struct ubi32_serdes_port *)port;
+
+	IO_PORT_INT_MASK(port) = 0;
+	free_irq(port->irq, uart);
+}
+
+static void
+ubi32_serdes_set_termios(struct uart_port *port, struct ktermios *termios,
+		   struct ktermios *old)
+{
+	unsigned long flags;
+	unsigned int baud;
+
+	spin_lock_irqsave(&port->lock, flags);
+
+	port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
+		| ULITE_STATUS_TXFULL;
+
+	if (termios->c_iflag & INPCK)
+		port->read_status_mask |=
+			ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
+
+	port->ignore_status_mask = 0;
+	if (termios->c_iflag & IGNPAR)
+		port->ignore_status_mask |= ULITE_STATUS_PARITY
+			| ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
+
+	/* ignore all characters if CREAD is not set */
+	if ((termios->c_cflag & CREAD) == 0)
+		port->ignore_status_mask |=
+			ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
+			| ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
+
+	/* update timeout */
+	baud = uart_get_baud_rate(port, termios, old, 0, 460800);
+	uart_update_timeout(port, termios->c_cflag, baud);
+
+	IO_PORT(port)->ctl0 = SERIAL_UBICOM_CTL0 |
+			((port->uartclk / (16 * baud)) - 1);
+
+	spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static const char *ubi32_serdes_type(struct uart_port *port)
+{
+	return port->type == PORT_UBI32_SERDES ? "UBI32_SERDES" : NULL;
+}
+
+/*
+ * Release the memory region(s) being used by 'port'.
+ */
+static void ubi32_serdes_release_port(struct uart_port *port)
+{
+}
+
+/*
+ * Request the memory region(s) being used by 'port'.
+ */
+static int ubi32_serdes_request_port(struct uart_port *port)
+{
+	return 0;
+}
+
+/*
+ * Configure/autoconfigure the port.
+ */
+static void ubi32_serdes_config_port(struct uart_port *port, int flags)
+{
+	if (flags & UART_CONFIG_TYPE &&
+	    ubi32_serdes_request_port(port) == 0)
+		port->type = PORT_UBI32_SERDES;
+}
+
+/*
+ * Verify the new serial_struct (for TIOCSSERIAL).
+ * The only change we allow are to the flags and type, and
+ * even then only between PORT_UBI32_SERDES and PORT_UNKNOWN
+ */
+static int
+ubi32_serdes_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+	return 0;
+}
+
+static struct uart_ops ubi32_serdes_pops = {
+	.tx_empty	= ubi32_serdes_tx_empty,
+	.set_mctrl	= ubi32_serdes_set_mctrl,
+	.get_mctrl	= ubi32_serdes_get_mctrl,
+	.stop_tx	= ubi32_serdes_stop_tx,
+	.start_tx	= ubi32_serdes_start_tx,
+	.stop_rx	= ubi32_serdes_stop_rx,
+	.enable_ms	= ubi32_serdes_enable_ms,
+	.break_ctl	= ubi32_serdes_break_ctl,
+	.startup	= ubi32_serdes_startup,
+	.shutdown	= ubi32_serdes_shutdown,
+	.set_termios	= ubi32_serdes_set_termios,
+	.type		= ubi32_serdes_type,
+	.release_port	= ubi32_serdes_release_port,
+	.request_port	= ubi32_serdes_request_port,
+	.config_port	= ubi32_serdes_config_port,
+	.verify_port	= ubi32_serdes_verify_port,
+};
+
+static void __init ubi32_serdes_init_ports(void)
+{
+	int i;
+
+	for (i = 0; i < NR_PORTS; i++) {
+		ubi32_serdes_ports[i].uartclk   = ubi32_serdes_resource[i].uart_clock;
+		ubi32_serdes_ports[i].ops       = &ubi32_serdes_pops;
+		ubi32_serdes_ports[i].line      = i;
+		ubi32_serdes_ports[i].iotype    = UPIO_MEM;
+		ubi32_serdes_ports[i].membase   =
+			(void __iomem *)ubi32_serdes_resource[i].uart_base_addr;
+		ubi32_serdes_ports[i].mapbase   =
+			(resource_size_t)ubi32_serdes_resource[i].uart_base_addr;
+		ubi32_serdes_ports[i].irq       =
+			ubi32_serdes_resource[i].uart_irq;
+		ubi32_serdes_ports[i].flags     = UPF_BOOT_AUTOCONF;
+
+		ubi32_serdes_hw_init(&ubi32_serdes_ports[i], 0);
+	}
+
+}
+
+#ifdef CONFIG_SERIAL_UBI32_SERDES_CONSOLE
+/*
+ * If the port was already initialised (eg, by a boot loader),
+ * try to determine the current setup.
+ */
+static void __init
+ubi32_serdes_console_get_options(struct uart_port *port, int *baud)
+{
+	u32 round_to = 1200;
+	u32 real_baud;
+
+	/*
+	 * We might get called before platform init and with no
+	 * kernel command line options, so port might be NULL.
+	 */
+	*baud = ubi32_serdes_default_baud_rate;;
+	if ( IO_PORT(port) == 0 )
+		return;
+
+	real_baud = port->uartclk
+		/ (16 * ((IO_PORT(port)->ctl0 & ~SERIAL_UBICOM_CTL0) + 1));
+
+	*baud = ((real_baud + round_to - 1) / round_to) * round_to;
+
+	pr_debug("%s:baud = %d, real_baud = %d\n", __FUNCTION__, *baud, real_baud);
+}
+#endif
+
+#if defined(CONFIG_SERIAL_UBI32_SERDES_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+static struct uart_driver ubi32_serdes_reg;
+
+static int __init
+ubi32_serdes_console_setup(struct console *co, char *options)
+{
+	struct uart_port *port;
+#ifdef CONFIG_SERIAL_UBI32_SERDES_CONSOLE
+	int baud = ubi32_serdes_default_baud_rate;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+#endif
+
+	/*
+	 * Check whether an invalid uart number has been specified, and
+	 * if so, search for the first available port that does have
+	 * console support.
+	 */
+	if (co->index == -1 || co->index >= NR_PORTS)
+		co->index = 0;
+	port = &ubi32_serdes_ports[co->index];
+
+#ifdef CONFIG_SERIAL_UBI32_SERDES_CONSOLE
+	if (options) {
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+		ubi32_serdes_hw_init(port, baud);
+	}
+	else
+		ubi32_serdes_console_get_options(port, &baud);
+
+	return uart_set_options(port, co, baud, parity, bits, flow);
+#else
+	return 0;
+#endif
+}
+#endif /* defined (CONFIG_SERIAL_UBI32_SERDES_CONSOLE) ||
+				 defined (CONFIG_EARLY_PRINTK) */
+
+#ifdef CONFIG_SERIAL_UBI32_SERDES_CONSOLE
+static void
+ubi32_serdes_console_putchar(struct uart_port *port, int ch)
+{
+	if ( IO_PORT(port) ) {
+		while (!(IO_PORT_INT_STATUS(port) & IO_PORTX_INT_SERDES_TXBE))
+			barrier();
+		ubi32_serdes_put_char(IO_PORT(port), ch);
+	}
+}
+
+/*
+ * Interrupts are disabled on entering
+ */
+static void
+ubi32_serdes_console_write(struct console *co, const char *s, unsigned int count)
+{
+	struct uart_port *port = &ubi32_serdes_ports[co->index];
+	unsigned long flags = 0;
+
+	spin_lock_irqsave(&port->lock, flags);
+	uart_console_write(port, s, count, ubi32_serdes_console_putchar);
+	spin_unlock_irqrestore(&port->lock, flags);
+
+}
+
+static struct console ubi32_serdes_console = {
+	.name		= UBI32_SERDES_NAME,
+	.write		= ubi32_serdes_console_write,
+	.device		= uart_console_device,
+	.setup		= ubi32_serdes_console_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+	.data		= &ubi32_serdes_reg,
+};
+
+static int __init ubi32_serdes_console_init(void)
+{
+	ubi32_serdes_init_ports();
+	register_console(&ubi32_serdes_console);
+	return 0;
+}
+console_initcall(ubi32_serdes_console_init);
+
+#define UBI32_SERDES_CONSOLE	&ubi32_serdes_console
+#else
+#define UBI32_SERDES_CONSOLE	NULL
+#endif /* CONFIG_SERIAL_UBI32_SERDES_CONSOLE */
+
+
+#ifdef CONFIG_EARLY_PRINTK
+static __init void ubi32_serdes_early_putc(struct uart_port *port, int ch)
+{
+	unsigned timeout = 0xffff;
+
+	while ((!(IO_PORT_INT_STATUS(port) & IO_PORTX_INT_SERDES_TXBE)) && --timeout)
+		cpu_relax();
+	ubi32_serdes_put_char(IO_PORT(port), ch);
+}
+
+static __init void ubi32_serdes_early_write(struct console *con, const char *s,
+					unsigned int n)
+{
+	struct uart_port *port = &ubi32_serdes_ports[con->index];
+	unsigned int i;
+
+	for (i = 0; i < n; i++, s++) {
+		if (*s == '\n')
+			ubi32_serdes_early_putc(port, '\r');
+		ubi32_serdes_early_putc(port, *s);
+	}
+}
+
+static struct __init console ubi32_serdes_early_console = {
+	.name = "early_US",
+	.write = ubi32_serdes_early_write,
+	.device = uart_console_device,
+	.flags = CON_PRINTBUFFER,
+	.setup = ubi32_serdes_console_setup,
+	.index = -1,
+	.data  = &ubi32_serdes_reg,
+};
+
+/*
+ * XXX Unused in our driver. Need to find out what the termios initialization is good/needed for.
+ */
+struct console __init *ubi32_serdes_early_init(unsigned int port_index,
+						unsigned int cflag)
+{
+	struct uart_port *uart;
+	struct ktermios t;
+
+	if (port_index == -1 || port_index >= NR_PORTS)
+		port_index = 0;
+	ubi32_serdes_init_ports();
+	ubi32_serdes_early_console.index = port_index;
+	uart = &ubi32_serdes_ports[port_index];
+	t.c_cflag = cflag;
+	t.c_iflag = 0;
+	t.c_oflag = 0;
+	t.c_lflag = ICANON;
+	t.c_line = port_index;
+	ubi32_serdes_set_termios(uart, &t, &t);
+	return &ubi32_serdes_early_console;
+}
+
+#endif /* CONFIG_SERIAL_UBI32_SERDES_CONSOLE */
+
+static struct uart_driver ubi32_serdes_reg = {
+	.owner			= THIS_MODULE,
+	.driver_name		= "ubi32_serdes",
+	.dev_name		= UBI32_SERDES_NAME,
+	.major			= UBI32_SERDES_MAJOR,
+	.minor			= UBI32_SERDES_MINOR,
+	.nr			= NR_PORTS,
+	.cons			= UBI32_SERDES_CONSOLE,
+};
+
+static int ubi32_serdes_suspend(struct platform_device *dev, pm_message_t state)
+{
+	struct uart_port *port = platform_get_drvdata(dev);
+
+	if (port)
+		uart_suspend_port(&ubi32_serdes_reg, port);
+
+	return 0;
+}
+
+static int ubi32_serdes_resume(struct platform_device *dev)
+{
+	struct uart_port *port = platform_get_drvdata(dev);
+
+	if (port)
+		uart_resume_port(&ubi32_serdes_reg, port);
+
+	return 0;
+}
+
+static int ubi32_serdes_probe(struct platform_device *dev)
+{
+	struct resource *res = dev->resource;
+	int i;
+
+	for (i = 0; i < dev->num_resources; i++, res++) {
+		if (res->flags & IORESOURCE_MEM) {
+			ubi32_serdes_resource[0].uart_base_addr = (void *) res->start;
+		}
+		else if (res->flags & IORESOURCE_IRQ) {
+			ubi32_serdes_resource[0].uart_irq = res->start;
+		}
+		else if (res->flags & UBICOM32_SUART_IORESOURCE_CLOCK) {
+			ubi32_serdes_resource[0].uart_clock = res->start;
+		}
+	}
+
+	ubi32_serdes_init_ports();
+
+	return 0;
+}
+
+static int ubi32_serdes_remove(struct platform_device *pdev)
+{
+	struct uart_port *port = platform_get_drvdata(pdev);
+
+	platform_set_drvdata(pdev, NULL);
+
+	if (port)
+		uart_remove_one_port(&ubi32_serdes_reg, port);
+
+	return 0;
+}
+
+static struct platform_driver ubi32_serdes_driver = {
+	.remove		= ubi32_serdes_remove,
+	.suspend	= ubi32_serdes_suspend,
+	.resume		= ubi32_serdes_resume,
+	.driver		= {
+		.name	= "ubicom32suart",
+		.owner	= THIS_MODULE,
+	},
+};
+
+
+#ifndef MODULE
+/*
+ * Called at boot time.
+ *
+ * You can specify IO base, IRQ, and clock for the serdes serial port
+ * using kernel command line "serdes=0xiobase,irq,clock".  Values
+ * specified will be overwritten by platform device data, if present.
+ */
+static int __init ubi32_serdes_setup(char *str)
+{
+#define N_PARMS   (4+1)
+	int ints[N_PARMS];
+	int i;
+
+	str = get_options(str, ARRAY_SIZE(ints), ints);
+
+	for (i = 0; i < N_PARMS; i++) {
+		if (i < ints[0]) {
+			if (i == 0) {
+				ubi32_serdes_resource[0].uart_base_addr = (void *) ints[i+1];
+			}
+			else if (i == 1) {
+				ubi32_serdes_resource[0].uart_irq = ints[i+1];
+			}
+			else if (i == 2) {
+				ubi32_serdes_resource[0].uart_clock = ints[i+1];
+			}
+			else if (i == 3) {
+				ubi32_serdes_default_baud_rate = ints[i+1];
+			}
+		}
+	}
+	return 1;
+}
+
+__setup("serdes=", ubi32_serdes_setup);
+#endif
+
+static int __init ubi32_serdes_init(void)
+{
+	int ret;
+
+	pr_info("Serial: Ubicom32 serdes uart serial driver\n");
+
+	ret = platform_driver_probe(&ubi32_serdes_driver, ubi32_serdes_probe);
+	if (ret != 0) {
+		printk(KERN_INFO "serdes platform_driver_probe() failed: %d\n", ret);
+		return ret;
+	}
+
+	ubi32_serdes_init_ports();
+
+	ret = uart_register_driver(&ubi32_serdes_reg);
+	if ( ret == 0 ) {
+		ret = uart_add_one_port(&ubi32_serdes_reg, &ubi32_serdes_ports[0]);
+		if ( ret != 0 ) {
+			uart_unregister_driver(&ubi32_serdes_reg);
+		}
+	}
+
+	return ret;
+}
+
+static void __exit ubi32_serdes_exit(void)
+{
+	platform_driver_unregister(&ubi32_serdes_driver);
+	uart_unregister_driver(&ubi32_serdes_reg);
+}
+
+module_init(ubi32_serdes_init);
+module_exit(ubi32_serdes_exit);
+
+MODULE_AUTHOR("Rainer Keller <rkeller@ubicom.com>");
+MODULE_DESCRIPTION("Ubicom generic serial port driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_CHARDEV_MAJOR(UBI32_SERDES_MAJOR);
+MODULE_ALIAS("platform:ubi32_serdes");
diff --git a/target/linux/ubicom32/files/drivers/serial/ubi32_uarttio.c b/target/linux/ubicom32/files/drivers/serial/ubi32_uarttio.c
new file mode 100644
index 000000000..7aa374200
--- /dev/null
+++ b/target/linux/ubicom32/files/drivers/serial/ubi32_uarttio.c
@@ -0,0 +1,1172 @@
+/*
+ * drivers/serial/ubi32_uarttio.c
+ *   Ubicom32 Serial Virtual Peripherial Driver
+ *
+ * (C) Copyright 2009, Ubicom, Inc.
+ *
+ * This file is part of the Ubicom32 Linux Kernel Port.
+ *
+ * The Ubicom32 Linux Kernel Port is free software: you can redistribute
+ * it and/or modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation, either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * The Ubicom32 Linux Kernel Port is distributed in the hope that it
+ * will be useful, but WITHOUT ANY WARRANTY; without even the implied
+ * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+ * the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Ubicom32 Linux Kernel Port.  If not,
+ * see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/sysrq.h>
+#include <linux/platform_device.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+
+#include <asm/ip5000.h>
+#include <asm/gpio.h>
+#include <asm/thread.h>
+#include <asm/uart_tio.h>
+
+#define DRIVER_NAME	"ubi32_uarttio"
+
+/*
+ * For storing the module parameters.
+ */
+#define UBI32_UARTTIO_MAX_PARAM_LEN	80
+static char utio_ports_param[UBI32_UARTTIO_MAX_PARAM_LEN];
+
+/*
+ * UART name and device definitions
+ */
+#define UBI32_UARTTIO_NAME	"ttyUV" // XXX
+#define UBI32_UARTTIO_MAJOR	206 // XXX
+#define UBI32_UARTTIO_MINOR	64 // XXX
+
+/*
+ * The following structures are allocated statically because the
+ * memory allocation subsystem is not initialized this early on
+ */
+
+/*
+ * Per port structure
+ */
+struct ubi32_uarttio_port {
+	struct uarttio_uart		*uart;
+	unsigned int			tx_pin;
+	unsigned int			rx_pin;
+
+	struct uart_port		port;
+
+	u8_t				added;
+
+	/*
+	 * If this value is set, the port has had its direction set already
+	 */
+	u8_t				port_init;
+};
+static struct ubi32_uarttio_port uarttio_ports[CONFIG_SERIAL_UBI32_UARTTIO_NR_UARTS];
+
+/*
+ * Number of ports currently initialized
+ */
+static int uarttio_nports;
+
+/*
+ * Per device structure
+ */
+struct ubi32_uarttio_instance {
+	struct uarttio_regs		*regs;
+	struct ubi32_uarttio_port	*ports;
+
+	u8_t				irq_requested;
+	u8_t				driver_registered;
+	u8_t				irq;
+};
+static struct ubi32_uarttio_instance uarttio_inst;
+
+#ifdef CONFIG_SERIAL_UBI32_UARTTIO_CONSOLE
+static struct console ubi32_uarttio_console;
+#define UBI32_UARTTIO_CONSOLE	&ubi32_uarttio_console
+#else
+#define UBI32_UARTTIO_CONSOLE	NULL
+#endif
+
+static struct uart_driver ubi32_uarttio_uart_driver = {
+	.owner			= THIS_MODULE,
+	.driver_name		= DRIVER_NAME,
+	.dev_name		= UBI32_UARTTIO_NAME,
+	.major			= UBI32_UARTTIO_MAJOR,
+	.minor			= UBI32_UARTTIO_MINOR,
+	.cons			= UBI32_UARTTIO_CONSOLE,
+};
+
+#ifdef UBI32_UARTTIO_UNUSED
+/*
+ * ubi32_uarttio_get_send_space
+ */
+static int ubi32_uarttio_get_send_space(struct uarttio_uart *uart)
+{
+	int count = uart->tx_fifo_head - uart->tx_fifo_tail;
+	if (count < 0) {
+		count += uart->tx_fifo_size;
+	}
+	return uart->tx_fifo_size - count;
+}
+#endif
+
+/*
+ * ubi32_uarttio_get_recv_ready
+ */
+static int ubi32_uarttio_get_recv_ready(struct uarttio_uart *uart)
+{
+	int count = uart->rx_fifo_head - uart->rx_fifo_tail;
+	if (count < 0) {
+		count += uart->rx_fifo_size;
+	}
+	return count;
+}
+
+/*
+ * ubi32_uarttio_get_char()
+ */
+static u8_t ubi32_uarttio_get_char(struct uarttio_uart *uart)
+{
+	/*
+	 * Retrieve byte
+	 */
+	u32_t tail = uart->rx_fifo_tail;
+	u8_t data = uart->rx_fifo[tail];
+
+	if (++tail == uart->rx_fifo_size) {
+		tail = 0;
+	}
+	uart->rx_fifo_tail = tail;
+
+	return data;
+}
+
+/*
+ * ubi32_uarttio_put_char()
+ */
+static int ubi32_uarttio_put_char(struct uarttio_uart *uart, u8_t c)
+{
+	u32_t head = uart->tx_fifo_head;
+	u32_t prev = head;
+
+	/*
+	 * Wrap
+	 */
+	if (++head == uart->tx_fifo_size) {
+		head = 0;
+	}
+
+	/*
+	 * If there isn't any space, return EBUSY
+	 */
+	if (head == uart->tx_fifo_tail) {
+		return -EBUSY;
+	}
+
+	/*
+	 * Put the character in the queue
+	 */
+	uart->tx_fifo[prev] = c;
+	uart->tx_fifo_head = head;
+
+	return 0;
+}
+
+/*
+ * ubi32_uarttio_set_baud
+ */
+static int ubi32_uarttio_set_baud(struct ubi32_uarttio_port *uup, unsigned int baud)
+{
+	if (uup->uart->current_baud_rate == baud) {
+		return 0;
+	}
+
+	uup->uart->baud_rate = baud;
+	uup->uart->flags |= UARTTIO_UART_FLAG_SET_RATE;
+	while (uup->uart->flags & UARTTIO_UART_FLAG_SET_RATE) {
+		cpu_relax();
+	}
+
+	if (uup->uart->current_baud_rate != baud) {
+		/*
+		 * Failed to set baud rate
+		 */
+		printk(KERN_WARNING "Invalid baud rate %u, running at %u\n", baud, uup->uart->current_baud_rate);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/*
+ * ubi32_uarttio_handle_receive
+ */
+static void ubi32_uarttio_handle_receive(struct ubi32_uarttio_port *uup, int stat)
+{
+	struct uarttio_uart *uart = uup->uart;
+	struct uart_port *port = &uup->port;
+	struct tty_struct *tty = port->info->port.tty;
+	unsigned char ch = 0;
+	char flag = TTY_NORMAL;
+	int count;
+
+	if ((stat & (UARTTIO_UART_INT_RX | UARTTIO_UART_INT_RXFRAME | UARTTIO_UART_INT_RXOVF)) == 0) {
+		return;
+	}
+
+	if (stat & UARTTIO_UART_INT_RX) {
+		count = ubi32_uarttio_get_recv_ready(uart);
+		port->icount.rx += count;
+	}
+
+	if (stat & UARTTIO_UART_INT_RXOVF) {
+		port->icount.overrun++;
+	}
+
+	if (stat & UARTTIO_UART_INT_RXFRAME) {
+		port->icount.frame++;
+	}
+
+	stat &= ~port->ignore_status_mask;
+
+	if (stat & UARTTIO_UART_INT_RX) {
+		int i;
+		for (i = 0; i < count; i++) {
+			ch = ubi32_uarttio_get_char(uart);
+			tty_insert_flip_char(tty, ch, flag);
+		}
+	}
+
+	if (stat & UARTTIO_UART_INT_RXFRAME) {
+		tty_insert_flip_char(tty, 0, TTY_FRAME);
+	}
+
+	if (stat & UARTTIO_UART_INT_RXOVF) {
+		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
+	}
+}
+
+/*
+ * ubi32_uarttio_stop_tx
+ *	interrupts are disabled on entry
+ */
+static void ubi32_uarttio_stop_tx(struct uart_port *port)
+{
+	struct ubi32_uarttio_port *uup = port->private_data;
+
+	uup->uart->int_mask &= ~UARTTIO_UART_INT_TXBE;
+}
+
+/*
+ * ubi32_uarttio_handle_transmit
+ */
+static void ubi32_uarttio_handle_transmit(struct ubi32_uarttio_port *uup, int stat)
+{
+	struct uarttio_uart *uart = uup->uart;
+	struct uart_port *port = &uup->port;
+	struct circ_buf *xmit  = &port->info->xmit;
+
+	if (!(stat & UARTTIO_UART_INT_TXBE)) {
+		return;
+	}
+
+	if (port->x_char) {
+		if (ubi32_uarttio_put_char(uart, port->x_char)) {
+			return;
+		}
+		port->x_char = 0;
+		port->icount.tx++;
+		return;
+	}
+
+	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+		ubi32_uarttio_stop_tx(port);
+		return;
+	}
+
+	/*
+	 * Send as many characters as we can
+	 */
+	while (ubi32_uarttio_put_char(uart, xmit->buf[xmit->tail]) == 0) {
+		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+		port->icount.tx++;
+		if (uart_circ_empty(xmit)) {
+			break;
+		}
+	}
+
+	/* wake up */
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) {
+		uart_write_wakeup(port);
+	}
+
+	if (uart_circ_empty(xmit)) {
+		ubi32_uarttio_stop_tx(port);
+	}
+}
+
+/*
+ * ubi32_uarttio_start_tx
+ *	port is locked and interrupts are disabled
+ */
+static void ubi32_uarttio_start_tx(struct uart_port *port)
+{
+	struct ubi32_uarttio_port *uup = port->private_data;
+	struct uarttio_uart *uart = uup->uart;
+
+	uart->int_mask |= UARTTIO_UART_INT_TXBE;
+}
+
+/*
+ * ubi32_uarttio_stop_rx
+ *	Interrupts are enabled
+ */
+static void ubi32_uarttio_stop_rx(struct uart_port *port)
+{
+	struct ubi32_uarttio_port *uup = port->private_data;
+	struct uarttio_uart *uart = uup->uart;
+
+	/*
+	 * don't forward any more data (like !CREAD)
+	 */
+	uart->int_mask &= ~UARTTIO_UART_INT_RX;
+	port->ignore_status_mask = UARTTIO_UART_INT_RX;
+}
+
+/*
+ * ubi32_uarttio_enable_ms
+ *	Set the modem control timer to fire immediately.
+ */
+static void ubi32_uarttio_enable_ms(struct uart_port *port)
+{
+	/* N/A */
+}
+
+/*
+ * ubi32_uarttio_isr
+ */
+static irqreturn_t ubi32_uarttio_isr(int irq, void *appdata)
+{
+	struct ubi32_uarttio_port *uup = uarttio_ports;
+	int i;
+
+	/*
+	 * Service all of the ports
+	 */
+	for (i = 0; i < uarttio_nports; i++) {
+		unsigned int flags;
+
+		if (!(uup->uart->flags & UARTTIO_UART_FLAG_ENABLED)) {
+			uup++;
+			continue;
+		}
+
+		spin_lock(&uup->port.lock);
+
+		flags = uup->uart->int_flags;
+
+		uup->uart->int_flags = 0;
+
+		ubi32_uarttio_handle_receive(uup, flags);
+		ubi32_uarttio_handle_transmit(uup, flags);
+
+		tty_flip_buffer_push(uup->port.info->port.tty);
+
+		spin_unlock(&uup->port.lock);
+
+		uup++;
+	}
+
+	return IRQ_HANDLED;
+}
+
+/*
+ * ubi32_uarttio_tx_empty
+ *	Return TIOCSER_TEMT when transmitter is not busy.
+ */
+static unsigned int ubi32_uarttio_tx_empty(struct uart_port *port)
+{
+	struct ubi32_uarttio_port *uup = port->private_data;
+
+	if (uup->uart->tx_fifo_head == uup->uart->tx_fifo_tail) {
+		return TIOCSER_TEMT;
+	}
+
+	return 0;
+}
+
+/*
+ * ubi32_uarttio_get_mctrl
+ */
+static unsigned int ubi32_uarttio_get_mctrl(struct uart_port *port)
+{
+	return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+}
+
+/*
+ * ubi32_uarttio_set_mctrl
+ */
+static void ubi32_uarttio_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+	/* N/A */
+}
+
+/*
+ * ubi32_uarttio_break_ctl
+ */
+static void ubi32_uarttio_break_ctl(struct uart_port *port, int break_state)
+{
+	/* N/A */
+}
+
+/*
+ * ubi32_uarttio_startup
+ */
+static int ubi32_uarttio_startup(struct uart_port *port)
+{
+	struct ubi32_uarttio_port *uup = port->private_data;
+	struct uarttio_uart *uart = uup->uart;
+
+	uart->flags |= UARTTIO_UART_FLAG_ENABLED;
+
+	uart->int_mask |= UARTTIO_UART_INT_TXBE | UARTTIO_UART_INT_RX;
+
+	return 0;
+}
+
+/*
+ * ubi32_uarttio_shutdown
+ */
+static void ubi32_uarttio_shutdown(struct uart_port *port)
+{
+	struct ubi32_uarttio_port *uup = port->private_data;
+	struct uarttio_uart *uart = uup->uart;
+
+	uart->int_mask = 0;
+	uart->flags &= ~UARTTIO_UART_FLAG_ENABLED;
+}
+
+/*
+ * ubi32_uarttio_set_termios
+ */
+static void ubi32_uarttio_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old)
+{
+	struct ubi32_uarttio_port *uup = port->private_data;
+	unsigned long flags;
+	unsigned int baud;
+
+	spin_lock_irqsave(&port->lock, flags);
+
+#if 0
+	port->read_status_mask = UBI32_UARTTIO_RX | UBI32_UARTTIO_RXOVF | UBI32_UARTTIO_TXOVF;
+
+	if (termios->c_iflag & INPCK) {
+		port->read_status_mask |= UBI32_UARTTIO_RXFRAME;
+	}
+#endif
+
+	port->ignore_status_mask = 0;
+	if (termios->c_iflag & IGNPAR) {
+		port->ignore_status_mask |= UARTTIO_UART_INT_RXFRAME |
+					    UARTTIO_UART_INT_RXOVF;
+	}
+
+	/*
+	 * ignore all characters if CREAD is not set
+	 */
+	if ((termios->c_cflag & CREAD) == 0) {
+		port->ignore_status_mask |= UARTTIO_UART_INT_RX |
+					    UARTTIO_UART_INT_RXFRAME |
+					    UARTTIO_UART_INT_RXOVF;
+	}
+
+	/* update timeout */
+	baud = uart_get_baud_rate(port, termios, old, 0, 460800);
+	uart_update_timeout(port, termios->c_cflag, baud);
+
+	ubi32_uarttio_set_baud(uup, baud);
+	spin_unlock_irqrestore(&port->lock, flags);
+}
+
+/*
+ * ubi32_uarttio_type
+ */
+static const char *ubi32_uarttio_type(struct uart_port *port)
+{
+	return (port->type == PORT_UBI32_UARTTIO) ? "UBI32_UARTTIO" : NULL;
+}
+
+/*
+ * ubi32_uarttio_release_port
+ *	Release the memory region(s) being used by 'port'.
+ */
+static void ubi32_uarttio_release_port(struct uart_port *port)
+{
+}
+
+/*
+ * ubi32_uarttio_request_port
+ *	Request the memory region(s) being used by 'port'.
+ */
+static int ubi32_uarttio_request_port(struct uart_port *port)
+{
+	return 0;
+}
+
+/*
+ * ubi32_uarttio_config_port
+ *	Configure/autoconfigure the port.
+ */
+static void ubi32_uarttio_config_port(struct uart_port *port, int flags)
+{
+	if ((flags & UART_CONFIG_TYPE) && (ubi32_uarttio_request_port(port) == 0)) {
+		port->type = PORT_UBI32_UARTTIO;
+	}
+}
+
+/*
+ * ubi32_uarttio_verify_port
+ *	Verify the new serial_struct (for TIOCSSERIAL).
+ *
+ * The only change we allow are to the flags and type, and
+ * even then only between PORT_UBI32_UARTTIO and PORT_UNKNOWN
+ */
+static int ubi32_uarttio_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+	return 0;
+}
+
+static struct uart_ops ubi32_uarttio_pops = {
+	.tx_empty	= ubi32_uarttio_tx_empty,
+	.set_mctrl	= ubi32_uarttio_set_mctrl,
+	.get_mctrl	= ubi32_uarttio_get_mctrl,
+	.stop_tx	= ubi32_uarttio_stop_tx,
+	.start_tx	= ubi32_uarttio_start_tx,
+	.stop_rx	= ubi32_uarttio_stop_rx,
+	.enable_ms	= ubi32_uarttio_enable_ms,
+	.break_ctl	= ubi32_uarttio_break_ctl,
+	.startup	= ubi32_uarttio_startup,
+	.shutdown	= ubi32_uarttio_shutdown,
+	.set_termios	= ubi32_uarttio_set_termios,
+	.type		= ubi32_uarttio_type,
+	.release_port	= ubi32_uarttio_release_port,
+	.request_port	= ubi32_uarttio_request_port,
+	.config_port	= ubi32_uarttio_config_port,
+	.verify_port	= ubi32_uarttio_verify_port,
+};
+
+/*
+ * ubi32_uarttio_add_ports
+ */
+static int __init ubi32_uarttio_add_ports(void)
+{
+	int res = 0;
+	struct ubi32_uarttio_port *uup = uarttio_ports;
+	int i = 0;
+
+	for (i = 0; i < uarttio_nports; i++) {
+		/*
+		 * Setup the GPIOs
+		 */
+		res = gpio_request(uup->tx_pin, "ubi32_uarttio_tx");
+		if (res) {
+			printk(KERN_WARNING "Failed to request GPIO %d\n", uup->tx_pin);
+			res = -EBUSY;
+			goto next;
+		}
+
+		res = gpio_request(uup->rx_pin, "ubi32_uarttio_rx");
+		if (res) {
+			gpio_free(uup->tx_pin);
+			printk(KERN_WARNING "Failed to request GPIO %d\n", uup->rx_pin);
+			res = -EBUSY;
+			goto next;
+		}
+
+		res = uart_add_one_port(&ubi32_uarttio_uart_driver, &uup->port);
+		if (res) {
+			gpio_free(uup->rx_pin);
+			gpio_free(uup->tx_pin);
+			res = -ENODEV;
+			printk(KERN_WARNING "Failed to add port %d,%d\n", uup->tx_pin, uup->rx_pin);
+			goto next;
+		}
+		uup->added = 1;
+
+		/*
+		 * Set the direction of the ports now, after we're sure that everything is ok
+		 */
+		if (!uup->port_init) {
+			gpio_direction_output(uup->tx_pin, 1);
+			gpio_direction_input(uup->rx_pin);
+		}
+
+next:
+		uup++;
+	}
+	return res;
+}
+
+/*
+ * ubi32_uarttio_cleanup
+ */
+static void ubi32_uarttio_cleanup(void)
+{
+	struct ubi32_uarttio_port *uup;
+	int i;
+
+	/*
+	 * Stop the hardware thread
+	 */
+	if (uarttio_inst.regs) {
+		thread_disable(uarttio_inst.regs->thread);
+	}
+	if (uarttio_inst.irq_requested) {
+		free_irq(uarttio_inst.irq, NULL);
+	}
+
+	/*
+	 * Get rid of the ports
+	 */
+	uup = uarttio_inst.ports;
+	for (i = 0; i < uarttio_nports; i++) {
+		gpio_free(uup->tx_pin);
+		gpio_free(uup->rx_pin);
+		if (uup->added) {
+			uart_remove_one_port(&ubi32_uarttio_uart_driver, &uup->port);
+		}
+		uup++;
+	}
+
+	if (uarttio_inst.driver_registered) {
+		uart_unregister_driver(&ubi32_uarttio_uart_driver);
+	}
+}
+
+/*
+ * ubi32_uarttio_setup_port
+ *	Setup a port in the TIO registers
+ */
+static int ubi32_uarttio_setup_port(int index,
+				    struct uarttio_uart *uart,
+				    unsigned int baud, unsigned int tx_pin,
+				    unsigned int rx_pin)
+{
+	struct ubi32_uarttio_port *uup = &uarttio_ports[index];
+	void *tx_port = ubi_gpio_get_port(tx_pin);
+	void *rx_port = ubi_gpio_get_port(rx_pin);
+
+	/*
+	 * Verify the ports are on chip
+	 */
+	if (!tx_port || !rx_port) {
+		printk(KERN_WARNING "Invalid port(s) specified: %u or %u\n", tx_pin, rx_pin);
+		return -EINVAL;
+	}
+
+	uup->tx_pin = tx_pin;
+	uup->rx_pin = rx_pin;
+	uup->uart = uart;
+
+	/*
+	 * Setup the port structure
+	 */
+	uup->port.ops		= &ubi32_uarttio_pops;
+	uup->port.line		= index;
+	uup->port.iotype	= UPIO_MEM;
+	uup->port.flags		= UPF_BOOT_AUTOCONF;
+	uup->port.fifosize	= uup->uart->tx_fifo_size;
+	uup->port.private_data	= uup;
+
+	/*
+	 * We share this IRQ across all ports
+	 */
+	uup->port.irq		= uarttio_inst.irq;
+
+	/*
+	 * We really don't have a mem/map base but without these variables
+	 * set, the serial_core won't startup.
+	 */
+	uup->port.membase	= (void __iomem *)uup;
+	uup->port.mapbase	= (resource_size_t)uup;
+	spin_lock_init(&uup->port.lock);
+
+	/*
+	 * Set up the hardware
+	 */
+	uart->flags = UARTTIO_UART_FLAG_SET_RATE | UARTTIO_UART_FLAG_RESET;
+
+	uart->tx_port = (unsigned int)tx_port;
+	uart->tx_pin = gpio_pin_index(tx_pin);
+	uart->tx_bits = 8;
+	uart->tx_stop_bits = 1;
+
+	uart->rx_port = (unsigned int)rx_port;
+	uart->rx_pin = gpio_pin_index(rx_pin);
+	uart->rx_bits = 8;
+	uart->rx_stop_bits = 1;
+
+	uart->baud_rate = baud;
+
+	return 0;
+}
+
+enum ubi32_uarttio_parse_states {
+	UBI32_UARTTIO_PARSE_STATE_BAUD,
+	UBI32_UARTTIO_PARSE_STATE_TX_PIN,
+	UBI32_UARTTIO_PARSE_STATE_RX_PIN,
+	UBI32_UARTTIO_PARSE_STATE_HS,
+	UBI32_UARTTIO_PARSE_STATE_CTS_PIN,
+	UBI32_UARTTIO_PARSE_STATE_RTS_PIN,
+};
+
+/*
+ * ubi32_uarttio_parse_param
+ */
+static int ubi32_uarttio_parse_param(char *str)
+{
+	int res;
+	int i;
+	int baud = 0;
+	int tx_pin = 0;
+	int rx_pin = 0;
+	int hs = 0;
+	int cts_pin = 0;
+	int rts_pin = 0;
+	int nfound = 0;
+	enum ubi32_uarttio_parse_states state = UBI32_UARTTIO_PARSE_STATE_BAUD;
+	struct uarttio_uart *uart = uarttio_inst.regs->uarts;
+
+	/*
+	 * Run though the options and generate the proper structures
+	 */
+	res = get_option(&str, &i);
+	while ((res == 2) || (res == 1)) {
+		switch (state) {
+		case UBI32_UARTTIO_PARSE_STATE_BAUD:
+			/*
+			 * If we are here and nfound > 0 then create the port
+			 * based on the previous input
+			 */
+			if (nfound) {
+				/*
+				 * Create the port
+				 */
+				if (ubi32_uarttio_setup_port(nfound - 1, uart, baud, tx_pin, rx_pin)) {
+					/*
+					 * Port was invalid
+					 */
+					goto fail;
+				} else {
+					printk(KERN_INFO "Serial port %d: tx=%d:rx=%d @ %d\n", nfound, tx_pin, rx_pin, baud);
+					uart++;
+				}
+			}
+
+			/*
+			 * Reset the variables and go to the next state
+			 */
+			hs = 0;
+			baud = i;
+			state = UBI32_UARTTIO_PARSE_STATE_TX_PIN;
+			break;
+
+		case UBI32_UARTTIO_PARSE_STATE_TX_PIN:
+			tx_pin = i;
+			state = UBI32_UARTTIO_PARSE_STATE_RX_PIN;
+			break;
+
+		case UBI32_UARTTIO_PARSE_STATE_RX_PIN:
+			rx_pin = i;
+			state = UBI32_UARTTIO_PARSE_STATE_HS;
+			break;
+
+		case UBI32_UARTTIO_PARSE_STATE_HS:
+			hs = i;
+			if (hs) {
+				state = UBI32_UARTTIO_PARSE_STATE_CTS_PIN;
+				break;
+			}
+
+			if (nfound == uarttio_inst.regs->max_uarts) {
+				printk(KERN_WARNING "Maximum number of serial ports reached\n");
+				goto done;
+			}
+			nfound++;
+			state = UBI32_UARTTIO_PARSE_STATE_BAUD;
+			break;
+
+		case UBI32_UARTTIO_PARSE_STATE_CTS_PIN:
+			cts_pin = i;
+			state = UBI32_UARTTIO_PARSE_STATE_RTS_PIN;
+			break;
+
+		case UBI32_UARTTIO_PARSE_STATE_RTS_PIN:
+			rts_pin = i;
+
+			if (nfound == uarttio_inst.regs->max_uarts) {
+				printk(KERN_WARNING "Maximum number of serial ports reached\n");
+				goto done;
+			}
+			nfound++;
+			state = UBI32_UARTTIO_PARSE_STATE_BAUD;
+			break;
+		}
+		res = get_option(&str, &i);
+	}
+
+	if ((res > 2) || state != UBI32_UARTTIO_PARSE_STATE_BAUD) {
+		printk(KERN_WARNING "Parameter syntax error.\n");
+		res = -EINVAL;
+		goto fail;
+	}
+
+	/*
+	 * Create the final port
+	 */
+	if (ubi32_uarttio_setup_port(nfound - 1, uart, baud, tx_pin, rx_pin)) {
+		goto fail;
+	}
+	printk(KERN_INFO "Serial port %d: tx=%d:rx=%d @ %d\n", nfound, tx_pin, rx_pin, baud);
+
+done:
+	uarttio_nports = nfound;
+
+	return nfound ? 0 : -ENODEV;
+
+fail:
+	/*
+	 * Reset the ports
+	 */
+	uart = uarttio_inst.regs->uarts;
+	for (i = 0; i < uarttio_inst.regs->max_uarts; i++) {
+		uart->flags = 0;
+		uart++;
+	}
+
+	return res;
+}
+
+/*
+ * ubi32_uarttio_probe
+ */
+static int ubi32_uarttio_probe(void)
+{
+	int ret;
+	struct uarttio_node *uart_node;
+	char *str = utio_ports_param;
+	static int probed;
+	static int probe_result;
+
+	/*
+	 * We only want to be probed once, we could be probed twice
+	 * for example if we are used as a console
+	 */
+	if (probed) {
+		return probe_result;
+	}
+	probed = 1;
+
+	/*
+	 * Extract the TIO name from the setup string
+	 */
+	while (*str) {
+		if (*str == ',') {
+			*str++ = 0;
+			break;
+		}
+		str++;
+	}
+
+	if (!*str) {
+		probe_result = -EINVAL;
+		return -EINVAL;
+	}
+
+	uart_node = (struct uarttio_node *)devtree_find_node(utio_ports_param);
+	if (!uart_node) {
+		probe_result = -ENODEV;
+		return -ENODEV;
+	}
+
+	uarttio_inst.irq = uart_node->dn.recvirq;
+	uarttio_inst.regs = uart_node->regs;
+
+	/*
+	 * Parse module parameters.
+	 */
+	ret = ubi32_uarttio_parse_param(str);
+	if (ret != 0) {
+		ubi32_uarttio_cleanup();
+		probe_result = ret;
+		return ret;
+	}
+
+	ubi32_uarttio_uart_driver.nr = uarttio_nports;
+
+	return 0;
+}
+
+#if defined(CONFIG_SERIAL_UBI32_UARTTIO_CONSOLE)
+/*
+ * ubi32_uarttio_console_setup
+ */
+static int __init ubi32_uarttio_console_setup(struct console *co, char *options)
+{
+	int baud;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+	struct ubi32_uarttio_port *uup;
+
+	/*
+	 * Check whether an invalid uart number has been specified, and
+	 * if so, search for the first available port that does have
+	 * console support.
+	 */
+	if (co->index == -1 || co->index >= uarttio_nports) {
+		co->index = 0;
+	}
+	uup = &uarttio_ports[co->index];
+	baud = uup->uart->baud_rate;
+	uup->uart->flags |= UARTTIO_UART_FLAG_ENABLED;
+
+	/*
+	 * Setup the GPIOs
+	 *	We have to use the direct interface because the gpio
+	 *	subsystem is not available at this point.
+	 */
+	uup->port_init = 1;
+	UBICOM32_GPIO_SET_PIN_HIGH(uup->tx_pin);
+	UBICOM32_GPIO_SET_PIN_OUTPUT(uup->tx_pin);
+	UBICOM32_GPIO_SET_PIN_INPUT(uup->rx_pin);
+
+	/*
+	 * Start the thread
+	 */
+	thread_enable(uarttio_inst.regs->thread);
+
+	/*
+	 * Process options
+	 */
+	if (options) {
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+		if (ubi32_uarttio_set_baud(uup, baud)) {
+			baud = uup->uart->current_baud_rate;
+		}
+	}
+
+	return uart_set_options(&uup->port, co, baud, 'n', 8, 'n');
+}
+
+/*
+ * ubi32_uarttio_console_putchar
+ */
+static void ubi32_uarttio_console_putchar(struct uart_port *port, int ch)
+{
+	struct ubi32_uarttio_port *uup = port->private_data;
+
+	while (ubi32_uarttio_put_char(uup->uart, ch)) {
+		cpu_relax();
+	}
+}
+
+/*
+ * ubi32_uarttio_console_write
+ *	Interrupts are disabled on entering
+ */
+static void ubi32_uarttio_console_write(struct console *co, const char *s, unsigned int count)
+{
+	struct uart_port *port = &(uarttio_ports[co->index].port);
+	unsigned long flags = 0;
+
+	spin_lock_irqsave(&port->lock, flags);
+	uart_console_write(port, s, count, ubi32_uarttio_console_putchar);
+	spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static struct console ubi32_uarttio_console = {
+	.name		= UBI32_UARTTIO_NAME,
+	.write		= ubi32_uarttio_console_write,
+	.device		= uart_console_device,
+	.setup		= ubi32_uarttio_console_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+	.data		= &ubi32_uarttio_uart_driver,
+};
+
+static int __init ubi32_uarttio_console_init(void)
+{
+	int res;
+
+	res = ubi32_uarttio_probe();
+	if (res) {
+		return res;
+	}
+
+	register_console(&ubi32_uarttio_console);
+	return 0;
+}
+console_initcall(ubi32_uarttio_console_init);
+#endif /* CONFIG_SERIAL_UBI32_UARTTIO_CONSOLE */
+
+/*
+ * ubi32_serial_suspend
+ */
+static int ubi32_uarttio_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	int i;
+	for (i = 0; i < uarttio_nports; i++) {
+		uart_suspend_port(&ubi32_uarttio_uart_driver, &uarttio_ports[i].port);
+	}
+
+	return 0;
+}
+
+/*
+ * ubi32_serial_resume
+ */
+static int ubi32_uarttio_resume(struct platform_device *pdev)
+{
+	int i;
+	for (i = 0; i < uarttio_nports; i++) {
+		uart_resume_port(&ubi32_uarttio_uart_driver, &uarttio_ports[i].port);
+	}
+
+	return 0;
+}
+
+/*
+ * ubi32_uarttio_remove
+ */
+static int __devexit ubi32_uarttio_remove(struct platform_device *pdev)
+{
+	ubi32_uarttio_cleanup();
+
+	uart_unregister_driver(&ubi32_uarttio_uart_driver);
+
+	return 0;
+}
+
+static struct platform_driver ubi32_uarttio_platform_driver = {
+	.remove		= __devexit_p(ubi32_uarttio_remove),
+	.suspend	= ubi32_uarttio_suspend,
+	.resume		= ubi32_uarttio_resume,
+	.driver		= {
+		.name	= DRIVER_NAME,
+		.owner	= THIS_MODULE,
+	},
+};
+
+#ifndef MODULE
+/*
+ * Called at boot time.
+ *
+ * uarttio=TIONAME,(baud,tx_pin,rx_pin,handshake[,cts_pin,rts_pin],...)
+ *	TIONAME is the name of the devtree node which describes the UARTTIO
+ *	pin is the index of the pin, i.e. PA4 is 5 [(port * 32) + pin]
+ *	handshake = 1 to enable handshaking, provide cts_pin, rts_pin (UNSUPPORTED)
+ *	handshake = 0 to disable handshaking, do not provide cts_pin, rts_pin
+ *	Ex: uarttio=UARTTIO,57600,7,6,0,9600,8,9,0
+ */
+static int __init ubi32_uarttio_setup(char *str)
+{
+	strncpy(utio_ports_param, str, UBI32_UARTTIO_MAX_PARAM_LEN);
+	utio_ports_param[UBI32_UARTTIO_MAX_PARAM_LEN - 1] = 0;
+	return 1;
+}
+__setup("uarttio=", ubi32_uarttio_setup);
+#endif
+
+/*
+ * ubi32_uarttio_init
+ */
+static int __init ubi32_uarttio_init(void)
+{
+	int ret;
+	int i;
+
+	ret = ubi32_uarttio_probe();
+	if (ret) {
+		return ret;
+	}
+
+	/*
+	 * Request the IRQ (do it here since many ports share the same IRQ)
+	 */
+	ret = request_irq(uarttio_inst.irq, ubi32_uarttio_isr, IRQF_DISABLED, DRIVER_NAME, NULL);
+	if (ret != 0) {
+		printk(KERN_WARNING "Could not request IRQ %d\n", uarttio_inst.irq);
+		goto fail;
+	}
+	uarttio_inst.irq_requested = 1;
+
+	/*
+	 * Register the UART driver and add the ports
+	 */
+	ret = uart_register_driver(&ubi32_uarttio_uart_driver);
+	if (ret != 0) {
+		goto fail;
+	}
+	uarttio_inst.driver_registered = 1;
+
+	ret = ubi32_uarttio_add_ports();
+	if (ret != 0) {
+		ubi32_uarttio_cleanup();
+		return ret;
+	}
+
+	/*
+	 * Start the thread
+	 */
+	thread_enable(uarttio_inst.regs->thread);
+
+	for (i = 0; i < uarttio_nports; i++) {
+		pr_info("Serial: Ubicom32 uarttio #%d: tx:%d rx:%d baud:%d\n",
+			i, uarttio_ports[i].tx_pin, uarttio_ports[i].rx_pin,
+			uarttio_ports[i].uart->current_baud_rate);
+	}
+	pr_info("Serial: Ubicom32 uarttio started on thread:%d irq:%d\n", uarttio_inst.regs->thread, uarttio_inst.irq);
+
+	return ret;
+
+fail:
+	ubi32_uarttio_cleanup();
+	return ret;
+}
+module_init(ubi32_uarttio_init);
+
+/*
+ * ubi32_uarttio_exit
+ */
+static void __exit ubi32_uarttio_exit(void)
+{
+	platform_driver_unregister(&ubi32_uarttio_platform_driver);
+}
+module_exit(ubi32_uarttio_exit);
+
+module_param_string(ports, utio_ports_param, sizeof(utio_ports_param), 0444);
+MODULE_PARM_DESC(ports, "Sets the ports to allocate: ports=TIONAME,(baud,txpin,rxpin,handshake[,ctspin,rtspin],...)\n"
+			"     TIONAME is the name of the devtree node which describes the UARTTIO\n"
+			"     pin is the index of the pin, i.e. PA4 is 5 [(port * 32) + pin]\n"
+			"     handshake = 1 to enable handshaking, provide ctspin, rtspin (UNSUPPORTED)\n"
+			"     handshake = 0 to disable handshaking, do not provide ctspin, rtspin\n"
+			"     Ex: ports=UARTTIO,57600,7,6,0,9600,8,9,0\n");
+MODULE_AUTHOR("Patrick Tjin <pat.tjin@ubicom.com>");
+MODULE_DESCRIPTION("Ubicom serial virtual peripherial driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_CHARDEV_MAJOR(UBI32_UARTTIO_MAJOR);
+MODULE_ALIAS("platform:" DRIVER_NAME);