diff options
| author | Roman Yeryomin <roman@advem.lv> | 2013-08-21 14:46:32 +0300 |
|---|---|---|
| committer | Roman Yeryomin <roman@advem.lv> | 2013-08-21 14:46:32 +0300 |
| commit | 6e8428d78c98c653f625aa0839437359306f99db (patch) | |
| tree | 70c9b5bedc15ff93f4effaf8ce44fc4a130feaa9 /target/linux/realtek/files/drivers/net/wireless/rtl8192cd/Hal8188EPwrSeq.h | |
| parent | dee99ab0143122146ab7713cfe171790bc796dd3 (diff) | |
Use newest realtek rtl8192cd driver from backfire alpha2 release.
Signed-off-by: Roman Yeryomin <roman@advem.lv>
Diffstat (limited to 'target/linux/realtek/files/drivers/net/wireless/rtl8192cd/Hal8188EPwrSeq.h')
| -rw-r--r-- | target/linux/realtek/files/drivers/net/wireless/rtl8192cd/Hal8188EPwrSeq.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/Hal8188EPwrSeq.h b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/Hal8188EPwrSeq.h index 0bde8f95d..950c9d0a4 100644 --- a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/Hal8188EPwrSeq.h +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/Hal8188EPwrSeq.h @@ -86,7 +86,7 @@ #define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \
- {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \
+ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \
{0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \
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