diff options
| author | Roman Yeryomin <roman@advem.lv> | 2012-09-13 00:40:35 +0300 |
|---|---|---|
| committer | Roman Yeryomin <roman@advem.lv> | 2013-05-26 00:44:46 +0300 |
| commit | a27354c9021a8423ef8c7d2bffad49cbf639eec1 (patch) | |
| tree | 2355929a4b8cf1888cd0797cfabdb42e0077c524 /target/linux/realtek/files/arch/rlx/include/asm/cachectl.h | |
| parent | 24a776baeb5d3cd903b144c89ceb11c5bc36a49e (diff) | |
Add realtek target files
Signed-off-by: Roman Yeryomin <roman@advem.lv>
Diffstat (limited to 'target/linux/realtek/files/arch/rlx/include/asm/cachectl.h')
| -rw-r--r-- | target/linux/realtek/files/arch/rlx/include/asm/cachectl.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/target/linux/realtek/files/arch/rlx/include/asm/cachectl.h b/target/linux/realtek/files/arch/rlx/include/asm/cachectl.h new file mode 100644 index 000000000..f3ce72186 --- /dev/null +++ b/target/linux/realtek/files/arch/rlx/include/asm/cachectl.h @@ -0,0 +1,26 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1994, 1995, 1996 by Ralf Baechle + */ +#ifndef _ASM_CACHECTL +#define _ASM_CACHECTL + +/* + * Options for cacheflush system call + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +/* + * Caching modes for the cachectl(2) call + * + * cachectl(2) is currently not supported and returns ENOSYS. + */ +#define CACHEABLE 0 /* make pages cacheable */ +#define UNCACHEABLE 1 /* make pages uncacheable */ + +#endif /* _ASM_CACHECTL */ |