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authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-11-20 07:19:10 +0000
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-11-20 07:19:10 +0000
commitdb9d0a7ff5d96c66b58aaa496b655e57804a638c (patch)
treefab8bdfbb9d86fde1591f80f7a1c306759c82649 /target/linux/ramips/files/arch/mips/include/asm/mach-ralink
parent984acca2800b0aedbf23b8bdcef7fd12f722f01e (diff)
ramips: set clk_is_20mhz for rt2x00 on RT3352/RT5350
Signed-off-by: Daniel Golle <dgolle@allnet.de> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34270 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/files/arch/mips/include/asm/mach-ralink')
-rw-r--r--target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
index 949232dbd..943facb6d 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
@@ -111,6 +111,8 @@
#define RT5350_SYSCFG0_DRAM_SIZE_32M 3
#define RT5350_SYSCFG0_DRAM_SIZE_64M 4
+#define RT3352_SYSCFG0_XTAL_SEL BIT(20)
+
#define RT3352_SYSCFG1_USB0_HOST_MODE BIT(10)
#define RT3352_CLKCFG1_UPHY0_CLK_EN BIT(18)