diff options
| author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-09-04 15:08:26 +0000 |
|---|---|---|
| committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-09-04 15:08:26 +0000 |
| commit | 2f3b768d56c443c04e57ada7ac6893ef7c8ab7bc (patch) | |
| tree | ccf6a5b81e9dc2421a4387d63ac2735067130ab1 /target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h | |
| parent | 3ff4f7ce16ee4fa844ab699d64c1b8f8f8065c07 (diff) | |
[ramips] add GPIO configuration feature
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17512 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h')
| -rw-r--r-- | target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h index 98308ffe0..d29880611 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h @@ -46,6 +46,7 @@ #define SYSC_REG_SYSTEM_CONFIG 0x010 /* System Configuration */ #define SYSC_REG_RESET_CTRL 0x034 /* Reset Control*/ #define SYSC_REG_RESET_STATUS 0x038 /* Reset Status*/ +#define SYSC_REG_GPIO_MODE 0x060 /* GPIO Purpose Select */ #define SYSC_REG_IA_ADDRESS 0x310 /* Illegal Access Address */ #define SYSC_REG_IA_TYPE 0x314 /* Illegal Access Type */ @@ -75,6 +76,15 @@ #define RT2880_RESET_FE BIT(18) #define RT2880_RESET_PCM BIT(19) +#define RT2880_GPIO_MODE_I2C BIT(0) +#define RT2880_GPIO_MODE_UART0 BIT(1) +#define RT2880_GPIO_MODE_SPI BIT(2) +#define RT2880_GPIO_MODE_UART1 BIT(3) +#define RT2880_GPIO_MODE_JTAG BIT(4) +#define RT2880_GPIO_MODE_MDIO BIT(5) +#define RT2880_GPIO_MODE_SDRAM BIT(6) +#define RT2880_GPIO_MODE_PCI BIT(7) + #define RT2880_INTC_INT_TIMER0 BIT(0) #define RT2880_INTC_INT_TIMER1 BIT(1) #define RT2880_INTC_INT_UART0 BIT(2) |