[lantiq] adds new lantiq kernel. once the codebase is fully tested and know to be working on all the devices previously supported by ifxmips, we will drop ifxmips support.

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@24526 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 136 insertions, 0 deletions

diff --git a/target/linux/lantiq/patches/101-header.patch b/target/linux/lantiq/patches/101-header.patch
new file mode 100644
index 000000000..3d0caf2f1
--- /dev/null
+++ b/target/linux/lantiq/patches/101-header.patch
@@ -0,0 +1,136 @@
+--- /dev/null
++++ b/arch/mips/include/asm/mach-lantiq/war.h
+@@ -0,0 +1,24 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ */
++#ifndef __ASM_MIPS_MACH_LANTIQ_WAR_H
++#define __ASM_MIPS_MACH_LANTIQ_WAR_H
++
++#define R4600_V1_INDEX_ICACHEOP_WAR     0
++#define R4600_V1_HIT_CACHEOP_WAR        0
++#define R4600_V2_HIT_CACHEOP_WAR        0
++#define R5432_CP0_INTERRUPT_WAR         0
++#define BCM1250_M3_WAR                  0
++#define SIBYTE_1956_WAR                 0
++#define MIPS4K_ICACHE_REFILL_WAR        0
++#define MIPS_CACHE_SYNC_WAR             0
++#define TX49XX_ICACHE_INDEX_INV_WAR     0
++#define RM9000_CDEX_SMP_WAR             0
++#define ICACHE_REFILLS_WORKAROUND_WAR   0
++#define R10000_LLSC_WAR                 0
++#define MIPS34K_MISSED_ITLB_WAR         0
++
++#endif
+--- /dev/null
++++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
+@@ -0,0 +1,47 @@
++/*
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
++ */
++
++#ifndef _LANTIQ_H__
++#define _LANTIQ_H__
++
++/* generic reg access functions */
++#define lq_r32(reg)						__raw_readl(reg)
++#define lq_w32(val, reg)				__raw_writel(val, reg)
++#define lq_w32_mask(clear, set, reg)	lq_w32((lq_r32(reg) & ~clear) | set, reg)
++
++extern unsigned int lq_get_cpu_ver(void);
++extern unsigned int lq_get_soc_type(void);
++
++/* clock speeds */
++#define CLOCK_60M			60000000
++#define CLOCK_83M			83333333
++#define CLOCK_111M			111111111
++#define CLOCK_111M			111111111
++#define CLOCK_133M			133333333
++#define CLOCK_167M			166666667
++#define CLOCK_200M			200000000
++#define CLOCK_333M			333333333
++#define CLOCK_400M			400000000
++
++/* spinlock all ebu i/o */
++extern spinlock_t ebu_lock;
++
++/* some irq helpers */
++extern void lq_disable_irq(unsigned int irq_nr);
++extern void lq_mask_and_ack_irq(unsigned int irq_nr);
++extern void lq_enable_irq(unsigned int irq_nr);
++
++#define IOPORT_RESOURCE_START		0x10000000
++#define IOPORT_RESOURCE_END		0xffffffff
++#define IOMEM_RESOURCE_START		0x10000000
++#define IOMEM_RESOURCE_END		0xffffffff
++
++#define LQ_FLASH_START		0x10000000
++#define LQ_FLASH_MAX		0x04000000
++
++#endif
+--- /dev/null
++++ b/arch/mips/include/asm/mach-lantiq/lantiq_regs.h
+@@ -0,0 +1,17 @@
++/*
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
++ */
++
++#ifndef _LANTIQ_REGS_H__
++#define _LANTIQ_REGS_H__
++
++#ifdef CONFIG_SOC_LANTIQ_XWAY
++#include <xway.h>
++#include <xway_irq.h>
++#endif
++
++#endif
+--- /dev/null
++++ b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h
+@@ -0,0 +1,36 @@
++/*
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
++ */
++
++#ifndef _LANTIQ_PLATFORM_H__
++#define _LANTIQ_PLATFORM_H__
++
++#include <linux/mtd/partitions.h>
++
++/* struct used to pass info to network drivers */
++enum {
++	MII_MODE,
++	REV_MII_MODE,
++};
++
++struct lq_eth_data {
++	unsigned char *mac;
++	int mii_mode;
++};
++
++/* struct used to pass info to the pci core */
++enum {
++	PCI_CLOCK_INT = 0,
++	PCI_CLOCK_EXT
++};
++
++struct lq_pci_data {
++	int clock;
++	int req_mask;
++};
++
++#endif