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authorblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>2008-06-22 19:01:14 +0000
committerblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>2008-06-22 19:01:14 +0000
commit112576f704f7cba6d1ea9ba9bad130800df310b6 (patch)
treea9f5a48db54bb023e6152eda8cc337efc012d5e0 /target/linux/ifxmips/files/include/asm-mips
parent19f6dff761b843cd355a617bb6c06d680a4520e4 (diff)
fixes several compile errors, reserves memory for second core, adds u-boot env parsing for ifxmips
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11558 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ifxmips/files/include/asm-mips')
-rw-r--r--target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h48
-rw-r--r--target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_gptu.h22
-rw-r--r--target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_prom.h27
-rw-r--r--target/linux/ifxmips/files/include/asm-mips/mach-ifxmips/gpio.h3
4 files changed, 81 insertions, 19 deletions
diff --git a/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h b/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h
index 706e7390a..a2efc7883 100644
--- a/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h
+++ b/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h
@@ -88,7 +88,7 @@
#define IFXMIPS_ASC1_RXFCON ((u32*)(IFXMIPS_ASC1_BASE_ADDR + 0x0040))
/* control */
-#define IFXMIPS_ASC1_CON ((u32*)(IFXMIPS_ASC1_BASE_ADDR + 0x0010))
+#define IFXMIPS_ASC1_CON ((u32*)(IFXMIPS_ASC1_BASE_ADDR + 0x0010))
/* timer reload */
#define IFXMIPS_ASC1_BG ((u32*)(IFXMIPS_ASC1_BASE_ADDR + 0x0050))
@@ -103,12 +103,12 @@
/*------------ RCU */
-
#define IFXMIPS_RCU_BASE_ADDR 0xBF203000
/* reset request */
-#define IFXMIPS_RCU_REQ ((u32*)(IFXMIPS_RCU_BASE_ADDR + 0x0010))
-#define IFXMIPS_RST_ALL 0x40000000
+#define IFXMIPS_RCU_RST ((u32*)(IFXMIPS_RCU_BASE_ADDR + 0x0010))
+#define IFXMIPS_RCU_RST_CPU1 (1 << 3)
+#define IFXMIPS_RCU_RST_ALL 0x40000000
#define IFXMIPS_RCU_RST_REQ_DFE (1 << 7)
#define IFXMIPS_RCU_RST_REQ_AFE (1 << 11)
@@ -440,6 +440,45 @@
#define MEI_XMEM_BAR16 ((u32*)(IFXMIPS_MEI_BASE_ADDR + 0x0094))
+/*------------ DEU */
+
+#define IFXMIPS_DEU_BASE (KSEG1 + 0x1E103100)
+#define IFXMIPS_DEU_CLK ((u32 *)(IFXMIPS_DEU_BASE + 0x0000))
+#define IFXMIPS_DEU_ID ((u32 *)(IFXMIPS_DEU_BASE + 0x0008))
+
+#define IFXMIPS_DES_CON ((u32 *)(IFXMIPS_DEU_BASE + 0x0010))
+#define IFXMIPS_DES_IHR ((u32 *)(IFXMIPS_DEU_BASE + 0x0014))
+#define IFXMIPS_DES_ILR ((u32 *)(IFXMIPS_DEU_BASE + 0x0018))
+#define IFXMIPS_DES_K1HR ((u32 *)(IFXMIPS_DEU_BASE + 0x001C))
+#define IFXMIPS_DES_K1LR ((u32 *)(IFXMIPS_DEU_BASE + 0x0020))
+#define IFXMIPS_DES_K3HR ((u32 *)(IFXMIPS_DEU_BASE + 0x0024))
+#define IFXMIPS_DES_K3LR ((u32 *)(IFXMIPS_DEU_BASE + 0x0028))
+#define IFXMIPS_DES_IVHR ((u32 *)(IFXMIPS_DEU_BASE + 0x002C))
+#define IFXMIPS_DES_IVLR ((u32 *)(IFXMIPS_DEU_BASE + 0x0030))
+#define IFXMIPS_DES_OHR ((u32 *)(IFXMIPS_DEU_BASE + 0x0040))
+#define IFXMIPS_DES_OLR ((u32 *)(IFXMIPS_DEU_BASE + 0x0050))
+#define IFXMIPS_AES_CON ((u32 *)(IFXMIPS_DEU_BASE + 0x0050))
+#define IFXMIPS_AES_ID3R ((u32 *)(IFXMIPS_DEU_BASE + 0x0054))
+#define IFXMIPS_AES_ID2R ((u32 *)(IFXMIPS_DEU_BASE + 0x0058))
+#define IFXMIPS_AES_ID1R ((u32 *)(IFXMIPS_DEU_BASE + 0x005C))
+#define IFXMIPS_AES_ID0R ((u32 *)(IFXMIPS_DEU_BASE + 0x0060))
+#define IFXMIPS_AES_K7R ((u32 *)(IFXMIPS_DEU_BASE + 0x0064))
+#define IFXMIPS_AES_K6R ((u32 *)(IFXMIPS_DEU_BASE + 0x0068))
+#define IFXMIPS_AES_K5R ((u32 *)(IFXMIPS_DEU_BASE + 0x006C))
+#define IFXMIPS_AES_K4R ((u32 *)(IFXMIPS_DEU_BASE + 0x0070))
+#define IFXMIPS_AES_K3R ((u32 *)(IFXMIPS_DEU_BASE + 0x0074))
+#define IFXMIPS_AES_K2R ((u32 *)(IFXMIPS_DEU_BASE + 0x0078))
+#define IFXMIPS_AES_K1R ((u32 *)(IFXMIPS_DEU_BASE + 0x007C))
+#define IFXMIPS_AES_K0R ((u32 *)(IFXMIPS_DEU_BASE + 0x0080))
+#define IFXMIPS_AES_IV3R ((u32 *)(IFXMIPS_DEU_BASE + 0x0084))
+#define IFXMIPS_AES_IV2R ((u32 *)(IFXMIPS_DEU_BASE + 0x0088))
+#define IFXMIPS_AES_IV1R ((u32 *)(IFXMIPS_DEU_BASE + 0x008C))
+#define IFXMIPS_AES_IV0R ((u32 *)(IFXMIPS_DEU_BASE + 0x0090))
+#define IFXMIPS_AES_0D3R ((u32 *)(IFXMIPS_DEU_BASE + 0x0094))
+#define IFXMIPS_AES_0D2R ((u32 *)(IFXMIPS_DEU_BASE + 0x0098))
+#define IFXMIPS_AES_OD1R ((u32 *)(IFXMIPS_DEU_BASE + 0x009C))
+#define IFXMIPS_AES_OD0R ((u32 *)(IFXMIPS_DEU_BASE + 0x00A0))
+
/*------------ FUSE */
#define IFXMIPS_FUSE_BASE_ADDR (KSEG1 + 0x1F107354)
@@ -448,6 +487,7 @@
/*------------ MPS */
#define IFXMIPS_MPS_BASE_ADDR (KSEG1 + 0x1F107000)
+#define IFXMIPS_MPS_SRAM ((u32*)(KSEG1 + 0x1F200000))
#define IFXMIPS_MPS_CHIPID ((u32*)(IFXMIPS_MPS_BASE_ADDR + 0x0344))
#define IFXMIPS_MPS_VC0ENR ((u32*)(IFXMIPS_MPS_BASE_ADDR + 0x0000))
diff --git a/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_gptu.h b/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_gptu.h
index 3b16b93b3..6ad4cc58c 100644
--- a/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_gptu.h
+++ b/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_gptu.h
@@ -139,24 +139,16 @@ struct gptu_ioctl_param {
* Data Type
* ####################################
*/
-#if defined(__KERNEL__)
- typedef void (*timer_callback)(unsigned long arg);
-#endif // defined(__KERNEL__)
+typedef void (*timer_callback)(unsigned long arg);
-/*
- * ####################################
- * Declaration
- * ####################################
- */
-
#if defined(__KERNEL__)
- extern int request_timer(unsigned int, unsigned int, unsigned long, unsigned long, unsigned long);
- extern int free_timer(unsigned int);
- extern int start_timer(unsigned int, int);
- extern int stop_timer(unsigned int);
- extern int reset_counter_flags(u32 timer, u32 flags);
- extern int get_count_value(unsigned int, unsigned long *);
+ extern int ifxmips_request_timer(unsigned int, unsigned int, unsigned long, unsigned long, unsigned long);
+ extern int ifxmips_free_timer(unsigned int);
+ extern int ifxmips_start_timer(unsigned int, int);
+ extern int ifxmips_stop_timer(unsigned int);
+ extern int ifxmips_reset_counter_flags(u32 timer, u32 flags);
+ extern int ifxmips_get_count_value(unsigned int, unsigned long *);
extern u32 cal_divider(unsigned long);
diff --git a/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_prom.h b/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_prom.h
new file mode 100644
index 000000000..248fe50ad
--- /dev/null
+++ b/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_prom.h
@@ -0,0 +1,27 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
+ *
+ */
+
+#ifndef _IFXPROM_H__
+#define _IFXPROM_H__
+
+void prom_printf(const char * fmt, ...);
+u32 *prom_get_cp1_base(void);
+u32 prom_get_cp1_size(void);
+
+#endif
diff --git a/target/linux/ifxmips/files/include/asm-mips/mach-ifxmips/gpio.h b/target/linux/ifxmips/files/include/asm-mips/mach-ifxmips/gpio.h
index 18fd49e27..0d207b093 100644
--- a/target/linux/ifxmips/files/include/asm-mips/mach-ifxmips/gpio.h
+++ b/target/linux/ifxmips/files/include/asm-mips/mach-ifxmips/gpio.h
@@ -28,14 +28,17 @@
static inline int gpio_direction_input(unsigned gpio) {
ifxmips_port_set_dir_in(0, gpio);
+ return 0;
}
static inline int gpio_direction_output(unsigned gpio, int value) {
ifxmips_port_set_dir_out(0, gpio);
+ return 0;
}
static inline int gpio_get_value(unsigned gpio) {
ifxmips_port_get_input(0, gpio);
+ return 0;
}
static inline void gpio_set_value(unsigned gpio, int value) {