diff options
| author | nbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2008-01-06 19:28:07 +0000 |
|---|---|---|
| committer | nbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2008-01-06 19:28:07 +0000 |
| commit | 90fba37c49479ed4e5233dc0d348cdf7d24c9ee1 (patch) | |
| tree | 58af9e3b3204308a2b7853127331f4d693e1b744 /target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/sbpci.h | |
| parent | b59f896089edf83ce4cd1951001b6cc889bdd287 (diff) | |
update brcm-2.4 to 2.4.35.4, integrate new broadcom system code, update broadcom-wl to a contributed version (v4.150.10.5) - no bcm57xx support yet, will follow shortly
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10137 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/sbpci.h')
| -rw-r--r-- | target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/sbpci.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/sbpci.h b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/sbpci.h index 761e5b451..f35ed910e 100644 --- a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/sbpci.h +++ b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/sbpci.h @@ -1,7 +1,7 @@ /* * HND SiliconBackplane PCI core hardware definitions. * - * Copyright 2006, Broadcom Corporation + * Copyright 2007, Broadcom Corporation * All Rights Reserved. * * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY @@ -9,7 +9,7 @@ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. * - * $Id: sbpci.h,v 1.1.1.11 2006/02/27 03:43:16 honor Exp $ + * $Id$ */ #ifndef _sbpci_h_ @@ -68,8 +68,11 @@ typedef struct sbpciregs { #define PCI_PARKID_EXT0 0 /* External master 0 */ #define PCI_PARKID_EXT1 1 /* External master 1 */ #define PCI_PARKID_EXT2 2 /* External master 2 */ -#define PCI_PARKID_INT 3 /* Internal master */ -#define PCI_PARKID_LAST 4 /* Last active master */ +#define PCI_PARKID_EXT3 3 /* External master 3 (rev >= 11) */ +#define PCI_PARKID_INT 3 /* Internal master (rev < 11) */ +#define PCI11_PARKID_INT 4 /* Internal master (rev >= 11) */ +#define PCI_PARKID_LAST 4 /* Last active master (rev < 11) */ +#define PCI11_PARKID_LAST 5 /* Last active master (rev >= 11) */ /* Interrupt status/mask */ #define PCI_INTA 0x01 /* PCI INTA# is asserted */ |