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authornbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-02-10 11:46:37 +0000
committernbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-02-10 11:46:37 +0000
commitd2514fe7ac14635d86f3e782c0bcc4bd2709db26 (patch)
tree6fd0636ba82d030fcb6ab98c6188c49d96bc2a65 /target/linux/ar71xx
parentf243888497a64a59b110154684b3508f07fdea6e (diff)
ar71xx: disable DDR flush for ethernet on AR934x, it is no longer necessary
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30409 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx')
-rw-r--r--target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch49
1 files changed, 49 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch b/target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch
new file mode 100644
index 000000000..64ffebfbe
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch
@@ -0,0 +1,49 @@
+--- a/arch/mips/ath79/dev-eth.c
++++ b/arch/mips/ath79/dev-eth.c
+@@ -331,6 +331,10 @@ static void ar934x_set_speed_ge1(int spe
+ /* TODO */
+ }
+
++static void ath79_ddr_no_flush(void)
++{
++}
++
+ static void ath79_ddr_flush_ge0(void)
+ {
+ ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0);
+@@ -371,16 +375,6 @@ static void ar933x_ddr_flush_ge1(void)
+ ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1);
+ }
+
+-static void ar934x_ddr_flush_ge0(void)
+-{
+- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE0);
+-}
+-
+-static void ar934x_ddr_flush_ge1(void)
+-{
+- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE1);
+-}
+-
+ static struct resource ath79_eth0_resources[] = {
+ {
+ .name = "mac_base",
+@@ -817,17 +811,16 @@ void __init ath79_register_eth(unsigned
+ if (id == 0) {
+ pdata->reset_bit = AR934X_RESET_GE0_MAC |
+ AR934X_RESET_GE0_MDIO;
+- pdata->ddr_flush =ar934x_ddr_flush_ge0;
+ pdata->set_speed = ar934x_set_speed_ge0;
+ } else {
+ pdata->reset_bit = AR934X_RESET_GE1_MAC |
+ AR934X_RESET_GE1_MDIO;
+- pdata->ddr_flush = ar934x_ddr_flush_ge1;
+ pdata->set_speed = ar934x_set_speed_ge1;
+
+ pdata->switch_data = &ath79_switch_data;
+ }
+
++ pdata->ddr_flush = ath79_ddr_no_flush;
+ pdata->has_gbit = 1;
+ pdata->is_ar724x = 1;
+