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authorhauke <hauke@3c298f89-4303-0410-b956-a3cf2f4a3e73>2010-01-31 15:06:17 +0000
committerhauke <hauke@3c298f89-4303-0410-b956-a3cf2f4a3e73>2010-01-31 15:06:17 +0000
commita276d0b61b71916bf71ca9ae054c0fd3c1f60f24 (patch)
treedf4b425f40945cf9d251f233f98a96c8eb0ce0c6 /target/linux/amazon/files/include/asm-mips
parentb82a808fbcfb06ffa0b84d48e8c8e16db7daf1a3 (diff)
[amazon] move files to correct position
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19453 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/amazon/files/include/asm-mips')
-rw-r--r--target/linux/amazon/files/include/asm-mips/mach-amazon/irq.h7
-rw-r--r--target/linux/amazon/files/include/asm-mips/mach-amazon/mangle-port.h52
-rw-r--r--target/linux/amazon/files/include/asm-mips/mach-amazon/war.h24
3 files changed, 0 insertions, 83 deletions
diff --git a/target/linux/amazon/files/include/asm-mips/mach-amazon/irq.h b/target/linux/amazon/files/include/asm-mips/mach-amazon/irq.h
deleted file mode 100644
index e72b7d5c1..000000000
--- a/target/linux/amazon/files/include/asm-mips/mach-amazon/irq.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __AMAZON_IRQ_H
-#define __AMAZON_IRQ_H
-
-#define NR_IRQS 256
-#include_next <irq.h>
-
-#endif
diff --git a/target/linux/amazon/files/include/asm-mips/mach-amazon/mangle-port.h b/target/linux/amazon/files/include/asm-mips/mach-amazon/mangle-port.h
deleted file mode 100644
index af8c3e939..000000000
--- a/target/linux/amazon/files/include/asm-mips/mach-amazon/mangle-port.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003, 2004 Ralf Baechle
- */
-#ifndef __ASM_MACH_AMAZON_MANGLE_PORT_H
-#define __ASM_MACH_AMAZON_MANGLE_PORT_H
-
-#define __swizzle_addr_b(port) (port)
-#define __swizzle_addr_w(port) ((port) ^ 2)
-#define __swizzle_addr_l(port) (port)
-#define __swizzle_addr_q(port) (port)
-
-/*
- * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
- * less sane hardware forces software to fiddle with this...
- *
- * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
- * you can't have the numerical value of data and byte addresses within
- * multibyte quantities both preserved at the same time. Hence two
- * variations of functions: non-prefixed ones that preserve the value
- * and prefixed ones that preserve byte addresses. The latters are
- * typically used for moving raw data between a peripheral and memory (cf.
- * string I/O functions), hence the "__mem_" prefix.
- */
-#if defined(CONFIG_SWAP_IO_SPACE)
-
-# define ioswabb(a, x) (x)
-# define __mem_ioswabb(a, x) (x)
-# define ioswabw(a, x) le16_to_cpu(x)
-# define __mem_ioswabw(a, x) (x)
-# define ioswabl(a, x) le32_to_cpu(x)
-# define __mem_ioswabl(a, x) (x)
-# define ioswabq(a, x) le64_to_cpu(x)
-# define __mem_ioswabq(a, x) (x)
-
-#else
-
-# define ioswabb(a, x) (x)
-# define __mem_ioswabb(a, x) (x)
-# define ioswabw(a, x) (x)
-# define __mem_ioswabw(a, x) cpu_to_le16(x)
-# define ioswabl(a, x) (x)
-# define __mem_ioswabl(a, x) cpu_to_le32(x)
-# define ioswabq(a, x) (x)
-# define __mem_ioswabq(a, x) cpu_to_le32(x)
-
-#endif
-
-#endif /* __ASM_MACH_AMAZON_MANGLE_PORT_H */
diff --git a/target/linux/amazon/files/include/asm-mips/mach-amazon/war.h b/target/linux/amazon/files/include/asm-mips/mach-amazon/war.h
deleted file mode 100644
index da42ee5a2..000000000
--- a/target/linux/amazon/files/include/asm-mips/mach-amazon/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- */
-#ifndef __ASM_MIPS_MACH_AMAZON_WAR_H
-#define __ASM_MIPS_MACH_AMAZON_WAR_H
-
-#define R4600_V1_INDEX_ICACHEOP_WAR 0
-#define R4600_V1_HIT_CACHEOP_WAR 0
-#define R4600_V2_HIT_CACHEOP_WAR 0
-#define R5432_CP0_INTERRUPT_WAR 0
-#define BCM1250_M3_WAR 0
-#define SIBYTE_1956_WAR 0
-#define MIPS4K_ICACHE_REFILL_WAR 0
-#define MIPS_CACHE_SYNC_WAR 0
-#define TX49XX_ICACHE_INDEX_INV_WAR 0
-#define RM9000_CDEX_SMP_WAR 0
-#define ICACHE_REFILLS_WORKAROUND_WAR 0
-#define R10000_LLSC_WAR 0
-#define MIPS34K_MISSED_ITLB_WAR 0
-
-#endif