diff options
author | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2007-10-22 20:56:34 +0000 |
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committer | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2007-10-22 20:56:34 +0000 |
commit | 663af573eb897f7df39e85a652cd4f7cfb834f29 (patch) | |
tree | 27d471d824bb7099552b1889328cd863ed88efbb /target/linux/adm5120/files/include | |
parent | 01535e65a277f46aa658637a6a9a79f8212b237f (diff) |
Add preliminary support for the Routerboard 153 CF slot (#2550)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9403 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/adm5120/files/include')
-rw-r--r-- | target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_cf.h | 19 | ||||
-rw-r--r-- | target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h | 6 |
2 files changed, 25 insertions, 0 deletions
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_cf.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_cf.h new file mode 100644 index 000000000..e26e1d419 --- /dev/null +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_cf.h @@ -0,0 +1,19 @@ +#include <linux/types.h> +#include <linux/io.h> + +#include <adm5120_defs.h> +#include <adm5120_switch.h> + +/* CFRDY is connected to GPIO4/INTX_1 */ +#define ADM5120_CF_GPIO_NUM 4 +#define ADM5120_CF_IRQ_LEVEL_BIT 0x20 /* GPIO4 = 0x20, GPIO2 = 0x10 */ +#define ADM5120_IRQ_CFRDY 5 +#define EXTIO_WAIT_EN (0x1 << 6) +#define EXTIO_CS1_INT1_EN (0x1 << 5) +#define EXTIO_CS0_INT0_EN (0x1 << 4) + +struct cf_device { + int gpio_pin; + void *dev; + struct gendisk *gd; +}; diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h index 406d6c563..8209d88a4 100644 --- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h @@ -49,6 +49,12 @@ #define MPMC_REG_SC0 0x0200 /* for F_CS1_N */ #define MPMC_REG_SC1 0x0220 /* for F_CS0_N */ #define MPMC_REG_SC2 0x0240 +#define MPMC_REG_WEN2 0x0244 +#define MPMC_REG_OEN2 0x0248 +#define MPMC_REG_RD2 0x024C +#define MPMC_REG_PG2 0x0250 +#define MPMC_REG_WR2 0x0254 +#define MPMC_REG_TN2 0x0258 #define MPMC_REG_SC3 0x0260 /* Control register bits */ |