add uboot-lantiq (based on a patch contributed by Lantiq)

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20561 3c298f89-4303-0410-b956-a3cf2f4a3e73

6 files changed, 569 insertions, 0 deletions

diff --git a/package/uboot-lantiq/patches/000-build-infos.patch b/package/uboot-lantiq/patches/000-build-infos.patch
new file mode 100644
index 000000000..2afcc4c12
--- /dev/null
+++ b/package/uboot-lantiq/patches/000-build-infos.patch
@@ -0,0 +1,54 @@
+Add output like in linux kernel for current compiled file
+Used normaly in combination with make option -s
+
+Like in following example:
+
+$ make -s V=1
+[CC] tools/img2srec.c
+[CC] tools/bmp_logo.c
+[CC] examples/hello_world.c
+--- a/config.mk
++++ b/config.mk
+@@ -206,17 +206,42 @@ export	TEXT_BASE PLATFORM_CPPFLAGS PLATF
+ 
+ #########################################################################
+ 
++ifndef KBUILD_VERBOSE
++  KBUILD_VERBOSE:=0
++endif
++ifeq ("$(origin V)", "command line")
++  KBUILD_VERBOSE:=$(V)
++endif
++ifeq (,$(findstring s,$(MAKEFLAGS)))
++  KBUILD_VERBOSE:=0
++endif
++
++ifneq ($(KBUILD_VERBOSE),0)
++  define MESSAGE
++    @printf " %s %s/%s\n" $(1) $(2) $(3)
++  endef
++else
++  define MESSAGE
++  endef
++endif
++
+ # Allow boards to use custom optimize flags on a per dir/file basis
+ BCURDIR := $(notdir $(CURDIR))
++
+ $(obj)%.s:	%.S
++	$(call MESSAGE, [CPP],$(subst $(SRCTREE)/,,$(CURDIR)),$<)
+ 	$(CPP) $(AFLAGS) $(AFLAGS_$(@F)) $(AFLAGS_$(BCURDIR)) -o $@ $<
+ $(obj)%.o:	%.S
++	$(call MESSAGE, [AS], $(subst $(SRCTREE)/,,$(CURDIR)),$<)
+ 	$(CC)  $(AFLAGS) $(AFLAGS_$(@F)) $(AFLAGS_$(BCURDIR)) -o $@ $< -c
+ $(obj)%.o:	%.c
++	$(call MESSAGE, [CC], $(subst $(SRCTREE)/,,$(CURDIR)),$<)
+ 	$(CC)  $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c
+ $(obj)%.i:	%.c
++	$(call MESSAGE, [CPP],$(subst $(SRCTREE)/,,$(CURDIR)),$<)
+ 	$(CPP) $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c
+ $(obj)%.s:	%.c
++	$(call MESSAGE, [CC], $(subst $(SRCTREE)/,,$(CURDIR)),$<)
+ 	$(CC)  $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c -S
+ 
+ #########################################################################
diff --git a/package/uboot-lantiq/patches/010-fix-mips-flags.patch b/package/uboot-lantiq/patches/010-fix-mips-flags.patch
new file mode 100644
index 000000000..4c706a784
--- /dev/null
+++ b/package/uboot-lantiq/patches/010-fix-mips-flags.patch
@@ -0,0 +1,23 @@
+--- a/cpu/mips/config.mk
++++ b/cpu/mips/config.mk
+@@ -23,16 +23,18 @@
+ v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2)
+ MIPSFLAGS:=$(shell \
+ if [ "$v" -lt "14" ]; then \
+-	echo "-mcpu=4kc"; \
++	echo "-mcpu=mips32"; \
+ else \
+-	echo "-march=4kc -mtune=4kc"; \
++	echo "-mips32 -march=mips32 -mtune=mips32"; \
+ fi)
+ 
++ifndef ENDIANNESS
+ ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
+ ENDIANNESS = -EL
+ else
+ ENDIANNESS = -EB
+ endif
++endif
+ 
+ MIPSFLAGS += $(ENDIANNESS)
+ 
diff --git a/package/uboot-lantiq/patches/050-mips-enhancements.patch b/package/uboot-lantiq/patches/050-mips-enhancements.patch
new file mode 100644
index 000000000..d05646770
--- /dev/null
+++ b/package/uboot-lantiq/patches/050-mips-enhancements.patch
@@ -0,0 +1,124 @@
+--- a/cpu/mips/start.S
++++ b/cpu/mips/start.S
+@@ -69,6 +69,9 @@ _start:
+ #elif defined(CONFIG_PURPLE)
+ 	.word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */
+ 	.word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */
++#elif defined(CONFIG_SYS_EBU_BOOT)
++	.word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */
++	.word 0x00000000           /* phase of the flash                    */
+ #else
+ 	RVECENT(romReserved,2)
+ #endif
+@@ -202,7 +205,25 @@ _start:
+ 	 * 128 * 8 == 1024 == 0x400
+ 	 * so this is address R_VEC+0x400 == 0xbfc00400
+ 	 */
+-#ifdef CONFIG_PURPLE
++#ifndef CONFIG_PURPLE
++	XVECENT(romExcHandle,0x400);	/* bfc00400: Int, CauseIV=1 */
++	RVECENT(romReserved,129);
++	RVECENT(romReserved,130);
++	RVECENT(romReserved,131);
++	RVECENT(romReserved,132);
++	RVECENT(romReserved,133);
++	RVECENT(romReserved,134);
++	RVECENT(romReserved,135);
++	RVECENT(romReserved,136);
++	RVECENT(romReserved,137);
++	RVECENT(romReserved,138);
++	RVECENT(romReserved,139);
++	RVECENT(romReserved,140);
++	RVECENT(romReserved,141);
++	RVECENT(romReserved,142);
++	RVECENT(romReserved,143);
++	XVECENT(romExcHandle,0x480);	/* bfc00480: EJTAG debug exception */
++#else /* CONFIG_PURPLE */
+ /* 0xbfc00400 */
+ 	.word	0xdc870000
+ 	.word	0xfca70000
+@@ -228,6 +249,12 @@ _start:
+ #endif /* CONFIG_PURPLE */
+ 	.align 4
+ reset:
++#ifdef CONFIG_SYS_MIPS_MULTI_CPU
++	mfc0	k0, CP0_EBASE
++	and	k0, EBASEF_CPUNUM
++	bne	k0, zero, ifx_mips_handler_cpux
++	nop
++#endif
+ 
+ 	/* Clear watch registers.
+ 	 */
+@@ -239,6 +266,16 @@ reset:
+ 
+ 	setup_c0_status_reset
+ 
++#if defined(CONFIG_MIPS24KEC) || defined(CONFIG_MIPS34KC)
++	/* CONFIG7 register */
++	/* Erratum "RPS May Cause Incorrect Instruction Execution"
++	 * for 24KEC and 34KC */
++	mfc0	k0, CP0_CONFIG, 7
++	li	k1, MIPS_CONF7_RPS
++	or	k0, k1
++	mtc0	k0, CP0_CONFIG, 7
++#endif
++
+ 	/* Init Timer */
+ 	mtc0	zero, CP0_COUNT
+ 	mtc0	zero, CP0_COMPARE
+@@ -270,9 +307,12 @@ reset:
+ 	jalr	t9
+ 	nop
+ 
++#ifndef CONFIG_SYS_MIPS_CACHE_OPER_MODE
++#define CONFIG_SYS_MIPS_CACHE_OPER_MODE CONF_CM_CACHABLE_NONCOHERENT
++#endif
+ 	/* ... and enable them.
+ 	 */
+-	li	t0, CONF_CM_CACHABLE_NONCOHERENT
++	li	t0, CONFIG_SYS_MIPS_CACHE_OPER_MODE
+ 	mtc0	t0, CP0_CONFIG
+ #endif /* !CONFIG_SKIP_LOWLEVEL_INIT */
+ 
+@@ -419,3 +459,15 @@ romReserved:
+ 
+ romExcHandle:
+ 	b	romExcHandle
++
++	/* Additional handlers.
++	 */
++#ifdef CONFIG_SYS_MIPS_MULTI_CPU
++/*
++ * Stop Slave CPUs
++ */
++ifx_mips_handler_cpux:
++	wait;
++	b ifx_mips_handler_cpux;
++	nop;
++#endif
+--- a/include/asm-mips/mipsregs.h
++++ b/include/asm-mips/mipsregs.h
+@@ -57,6 +57,7 @@
+ #define CP0_CAUSE $13
+ #define CP0_EPC $14
+ #define CP0_PRID $15
++#define CP0_EBASE $15,1
+ #define CP0_CONFIG $16
+ #define CP0_LLADDR $17
+ #define CP0_WATCHLO $18
+@@ -395,6 +396,14 @@
+ #define  CAUSEF_BD		(_ULCAST_(1)   << 31)
+ 
+ /*
++ * Bits in the coprocessor 0 EBase register
++ */
++#define EBASEB_CPUNUM		0
++#define EBASEF_CPUNUM		(0x3ff << EBASEB_CPUNUM)
++#define EBASEB_EXPBASE		12
++#define EBASEF_EXPBASE		(0x3ffff << EBASEB_EXPBASE)
++
++/*
+  * Bits in the coprocessor 0 config register.
+  */
+ /* Generic bits.  */
diff --git a/package/uboot-lantiq/patches/062-cfi-addr-fixup.patch b/package/uboot-lantiq/patches/062-cfi-addr-fixup.patch
new file mode 100644
index 000000000..8f95da1f7
--- /dev/null
+++ b/package/uboot-lantiq/patches/062-cfi-addr-fixup.patch
@@ -0,0 +1,225 @@
+--- a/drivers/mtd/cfi_flash.c
++++ b/drivers/mtd/cfi_flash.c
+@@ -85,6 +85,22 @@ flash_info_t flash_info[CFI_MAX_FLASH_BA
+ #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
+ #endif
+ 
++/*
++ * Check if address fixup macros are defined, define defaults otherwise
++ */
++#ifndef FLASH_FIXUP_ADDR_8
++#define FLASH_FIXUP_ADDR_8(addr)	(addr)
++#endif
++#ifndef FLASH_FIXUP_ADDR_16
++#define FLASH_FIXUP_ADDR_16(addr)	(addr)
++#endif
++#ifndef FLASH_FIXUP_ADDR_32
++#define FLASH_FIXUP_ADDR_32(addr)	(addr)
++#endif
++#ifndef FLASH_FIXUP_ADDR_64
++#define FLASH_FIXUP_ADDR_64(addr)	(addr)
++#endif
++
+ static void __flash_write8(u8 value, void *addr)
+ {
+ 	__raw_writeb(value, addr);
+@@ -264,9 +280,9 @@ static inline uchar flash_read_uchar (fl
+ 
+ 	cp = flash_map (info, 0, offset);
+ #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
+-	retval = flash_read8(cp);
++	retval = flash_read8(FLASH_FIXUP_ADDR_8(cp));
+ #else
+-	retval = flash_read8(cp + info->portwidth - 1);
++	retval = flash_read8(FLASH_FIXUP_ADDR_8(cp) + info->portwidth - 1);
+ #endif
+ 	flash_unmap (info, 0, offset, cp);
+ 	return retval;
+@@ -280,7 +296,7 @@ static inline ushort flash_read_word (fl
+ 	ushort *addr, retval;
+ 
+ 	addr = flash_map (info, 0, offset);
+-	retval = flash_read16 (addr);
++	retval = flash_read16 (FLASH_FIXUP_ADDR_16(addr));
+ 	flash_unmap (info, 0, offset, addr);
+ 	return retval;
+ }
+@@ -305,19 +321,28 @@ static ulong flash_read_long (flash_info
+ 	debug ("long addr is at %p info->portwidth = %d\n", addr,
+ 	       info->portwidth);
+ 	for (x = 0; x < 4 * info->portwidth; x++) {
+-		debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
++		debug ("addr[%x] = 0x%x\n", x,
++			flash_read8(FLASH_FIXUP_ADDR_32(addr) + x));
+ 	}
+ #endif
+ #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
+-	retval = ((flash_read8(addr) << 16) |
+-		  (flash_read8(addr + info->portwidth) << 24) |
+-		  (flash_read8(addr + 2 * info->portwidth)) |
+-		  (flash_read8(addr + 3 * info->portwidth) << 8));
++	retval = ((flash_read8(FLASH_FIXUP_ADDR_8
++			      (addr) << 16) |
++		  (flash_read8(FLASH_FIXUP_ADDR_8
++			      (addr + info->portwidth)) << 24) |
++		  (flash_read8(FLASH_FIXUP_ADDR_8
++			      (addr + 2 * info->portwidth))) |
++		  (flash_read8(FLASH_FIXUP_ADDR_8
++			      (addr + 3 * info->portwidth)) << 8));
+ #else
+-	retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
+-		  (flash_read8(addr + info->portwidth - 1) << 16) |
+-		  (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
+-		  (flash_read8(addr + 3 * info->portwidth - 1)));
++	retval = ((flash_read8(FLASH_FIXUP_ADDR_8
++			      (addr + 2 * info->portwidth - 1)) << 24) |
++		  (flash_read8(FLASH_FIXUP_ADDR_8
++			      (addr + info->portwidth - 1)) << 16) |
++		  (flash_read8(FLASH_FIXUP_ADDR_8
++			      (addr + 4 * info->portwidth - 1)) << 8) |
++		  (flash_read8(FLASH_FIXUP_ADDR_8
++			      (addr + 3 * info->portwidth - 1))));
+ #endif
+ 	flash_unmap(info, sect, offset, addr);
+ 
+@@ -338,21 +363,22 @@ void flash_write_cmd (flash_info_t * inf
+ 	flash_make_cmd (info, cmd, &cword);
+ 	switch (info->portwidth) {
+ 	case FLASH_CFI_8BIT:
+-		debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
+-		       cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+-		flash_write8(cword.c, addr);
++		debug ("fwc addr %p cmd %x %x 8bit x %d bit\n",
++		       FLASH_FIXUP_ADDR_8(addr), cmd, cword.c,
++		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
++		flash_write8(cword.c, FLASH_FIXUP_ADDR_8(addr));
+ 		break;
+ 	case FLASH_CFI_16BIT:
+-		debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
+-		       cmd, cword.w,
++		debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n",
++		       FLASH_FIXUP_ADDR_16(addr), cmd, cword.w,
+ 		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+-		flash_write16(cword.w, addr);
++		flash_write16(cword.w, FLASH_FIXUP_ADDR_16(addr));
+ 		break;
+ 	case FLASH_CFI_32BIT:
+-		debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
+-		       cmd, cword.l,
++		debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n",
++		       FLASH_FIXUP_ADDR_32(addr), cmd, cword.l,
+ 		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+-		flash_write32(cword.l, addr);
++		flash_write32(cword.l, FLASH_FIXUP_ADDR_32(addr));
+ 		break;
+ 	case FLASH_CFI_64BIT:
+ #ifdef DEBUG
+@@ -362,11 +388,11 @@ void flash_write_cmd (flash_info_t * inf
+ 			print_longlong (str, cword.ll);
+ 
+ 			debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
+-			       addr, cmd, str,
++			       FLASH_FIXUP_ADDR_64(addr), cmd, str,
+ 			       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+ 		}
+ #endif
+-		flash_write64(cword.ll, addr);
++		flash_write64(cword.ll, FLASH_FIXUP_ADDR_64(addr));
+ 		break;
+ 	}
+ 
+@@ -397,16 +423,19 @@ static int flash_isequal (flash_info_t *
+ 	debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
+ 	switch (info->portwidth) {
+ 	case FLASH_CFI_8BIT:
+-		debug ("is= %x %x\n", flash_read8(addr), cword.c);
+-		retval = (flash_read8(addr) == cword.c);
++		debug ("is= %x %x\n",
++		       flash_read8(FLASH_FIXUP_ADDR_8(addr)), cword.c);
++		retval = (flash_read8(FLASH_FIXUP_ADDR_8(addr)) == cword.c);
+ 		break;
+ 	case FLASH_CFI_16BIT:
+-		debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
+-		retval = (flash_read16(addr) == cword.w);
++		debug ("is= %4.4x %4.4x\n",
++		       flash_read16(FLASH_FIXUP_ADDR_16(addr)), cword.w);
++		retval = (flash_read16(FLASH_FIXUP_ADDR_16(addr)) == cword.w);
+ 		break;
+ 	case FLASH_CFI_32BIT:
+-		debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
+-		retval = (flash_read32(addr) == cword.l);
++		debug ("is= %8.8x %8.8lx\n",
++		       flash_read32(FLASH_FIXUP_ADDR_32(addr)), cword.l);
++		retval = (flash_read32(FLASH_FIXUP_ADDR_32(addr)) == cword.l);
+ 		break;
+ 	case FLASH_CFI_64BIT:
+ #ifdef DEBUG
+@@ -414,12 +443,13 @@ static int flash_isequal (flash_info_t *
+ 			char str1[20];
+ 			char str2[20];
+ 
+-			print_longlong (str1, flash_read64(addr));
++			print_longlong (str1, flash_read64(FLASH_FIXUP_ADDR_64
++							  (addr)));
+ 			print_longlong (str2, cword.ll);
+ 			debug ("is= %s %s\n", str1, str2);
+ 		}
+ #endif
+-		retval = (flash_read64(addr) == cword.ll);
++		retval = (flash_read64(FLASH_FIXUP_ADDR_64(addr)) == cword.ll);
+ 		break;
+ 	default:
+ 		retval = 0;
+@@ -443,16 +473,20 @@ static int flash_isset (flash_info_t * i
+ 	flash_make_cmd (info, cmd, &cword);
+ 	switch (info->portwidth) {
+ 	case FLASH_CFI_8BIT:
+-		retval = ((flash_read8(addr) & cword.c) == cword.c);
++		retval = ((flash_read8(FLASH_FIXUP_ADDR_8(addr))
++			    & cword.c) == cword.c);
+ 		break;
+ 	case FLASH_CFI_16BIT:
+-		retval = ((flash_read16(addr) & cword.w) == cword.w);
++		retval = ((flash_read16(FLASH_FIXUP_ADDR_16(addr))
++			    & cword.w) == cword.w);
+ 		break;
+ 	case FLASH_CFI_32BIT:
+-		retval = ((flash_read32(addr) & cword.l) == cword.l);
++		retval = ((flash_read32(FLASH_FIXUP_ADDR_32(addr))
++			    & cword.l) == cword.l);
+ 		break;
+ 	case FLASH_CFI_64BIT:
+-		retval = ((flash_read64(addr) & cword.ll) == cword.ll);
++		retval = ((flash_read64(FLASH_FIXUP_ADDR_64(addr))
++			    & cword.ll) == cword.ll);
+ 		break;
+ 	default:
+ 		retval = 0;
+@@ -476,17 +510,22 @@ static int flash_toggle (flash_info_t * 
+ 	flash_make_cmd (info, cmd, &cword);
+ 	switch (info->portwidth) {
+ 	case FLASH_CFI_8BIT:
+-		retval = flash_read8(addr) != flash_read8(addr);
++		retval = flash_read8(FLASH_FIXUP_ADDR_8(addr)) !=
++			 flash_read8(FLASH_FIXUP_ADDR_8(addr));
+ 		break;
+ 	case FLASH_CFI_16BIT:
+-		retval = flash_read16(addr) != flash_read16(addr);
++		retval = flash_read16(FLASH_FIXUP_ADDR_16(addr)) !=
++			 flash_read16(FLASH_FIXUP_ADDR_16(addr));
+ 		break;
+ 	case FLASH_CFI_32BIT:
+-		retval = flash_read32(addr) != flash_read32(addr);
++		retval = flash_read32(FLASH_FIXUP_ADDR_32(addr)) !=
++			 flash_read32(FLASH_FIXUP_ADDR_32(addr));
+ 		break;
+ 	case FLASH_CFI_64BIT:
+-		retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
+-			   (flash_read32(addr+4) != flash_read32(addr+4)) );
++		retval = ( (flash_read32(FLASH_FIXUP_ADDR_64( addr )) !=
++			    flash_read32(FLASH_FIXUP_ADDR_64( addr ))) ||
++			   (flash_read32(FLASH_FIXUP_ADDR_64(addr+4)) !=
++			    flash_read32(FLASH_FIXUP_ADDR_64(addr+4))) );
+ 		break;
+ 	default:
+ 		retval = 0;
diff --git a/package/uboot-lantiq/patches/100-ifx_targets.patch b/package/uboot-lantiq/patches/100-ifx_targets.patch
new file mode 100644
index 000000000..9c313e0a4
--- /dev/null
+++ b/package/uboot-lantiq/patches/100-ifx_targets.patch
@@ -0,0 +1,112 @@
+--- a/MAKEALL
++++ b/MAKEALL
+@@ -709,6 +709,12 @@ LIST_arm="			\
+ ## MIPS Systems		(default = big endian)
+ #########################################################################
+ 
++LIST_ifxcpe="		\
++	easy50712	\
++	easy50712_DDR166M	\
++	easy50712_DDR166M_ramboot	\
++"
++
+ LIST_mips4kc="		\
+ 	incaip		\
+ 	qemu_mips	\
+@@ -740,6 +746,7 @@ LIST_au1xx0="		\
+ "
+ 
+ LIST_mips="		\
++	${LIST_ifxcpe}	\
+ 	${LIST_mips4kc}	\
+ 	${LIST_mips5kc}	\
+ 	${LIST_au1xx0}	\
+--- a/Makefile
++++ b/Makefile
+@@ -474,7 +475,7 @@ $(obj)include/autoconf.mk: $(obj)include
+ 	set -e ; \
+ 	: Extract the config macros ; \
+ 	$(CPP) $(CFLAGS) -DDO_DEPS_ONLY -dM include/common.h | \
+-		sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
++		sed -n -f tools/scripts/define2mk.sed |sort > $@.tmp && \
+ 	mv $@.tmp $@
+ 
+ #########################################################################
+@@ -3354,7 +3355,7 @@ incaip_config: unconfig
+ 		{ echo "#define CPU_CLOCK_RATE 150000000" >>$(obj)include/config.h ; \
+ 		  $(XECHO) "... with 150MHz system clock" ; \
+ 		}
+-	@$(MKCONFIG) -a $(call xtract_incaip,$@) mips mips incaip
++	@$(MKCONFIG) -a $(call xtract_incaip,$@) mips mips incaip infineon
+ 
+ tb0229_config: unconfig
+ 	@$(MKCONFIG) $(@:_config=) mips mips tb0229
+@@ -3395,6 +3396,30 @@ vct_platinumavc_onenand_small_config: un
+ 	@$(MKCONFIG) -a vct mips mips vct micronas
+ 
+ #########################################################################
++## MIPS32 ifxcpe
++#########################################################################
++
++easy50712%config	: unconfig
++	@mkdir -p $(obj)include
++	@mkdir -p $(obj)board/infineon/easy50712
++	@[ -z "$(findstring ramboot,$@)" ] || \
++		{ echo "TEXT_BASE = 0xA0400000" >$(obj)board/infineon/easy50712/config.tmp ; \
++			echo "#define CONFIG_SYS_RAMBOOT" >>$(obj)include/config.h ; \
++			$(XECHO) "... with ramboot configuration" ; \
++		}
++	@if [ "$(findstring _DDR,$@)" ] ; then \
++		echo "#define CONFIG_USE_DDR_RAM"  >>$(obj)include/config.h ; \
++		DDR=$(subst DDR,,$(filter DDR%,$(subst _, ,$@))); \
++		case "$${DDR}" in \
++		111M|166M|e111M|e166M|promos400|samsung166|psc166) \
++			$(XECHO) "... with DDR RAM config $${DDR}" ; \
++			echo "#define CONFIG_USE_DDR_RAM_CFG_$${DDR}" >>$(obj)include/config.h ;; \
++		*)	$(XECHO) "... DDR RAM config \\\"$${DDR}\\\" unknown, use default"; \
++		esac; \
++	fi
++	@$(MKCONFIG) -a $(word 1,$(subst _, ,$@)) mips mips easy50712 infineon danube
++
++#########################################################################
+ ## MIPS32 AU1X00
+ #########################################################################
+ 
+--- a/drivers/serial/Makefile
++++ b/drivers/serial/Makefile
+@@ -28,6 +28,7 @@ LIB	:= $(obj)libserial.a
+ COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o
+ COBJS-$(CONFIG_AT91RM9200_USART) += at91rm9200_usart.o
+ COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o
++COBJS-$(CONFIG_IFX_ASC) += ifx_asc.o
+ COBJS-$(CONFIG_MCFUART) += mcfuart.o
+ COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o
+ COBJS-$(CONFIG_SYS_NS16550) += ns16550.o
+--- a/drivers/net/Makefile
++++ b/drivers/net/Makefile
+@@ -41,6 +41,7 @@ COBJS-$(CONFIG_FEC_MXC) += fec_mxc.o
+ COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o
+ COBJS-$(CONFIG_FTMAC100) += ftmac100.o
+ COBJS-$(CONFIG_GRETH) += greth.o
++COBJS-$(CONFIG_IFX_ETOP) += ifx_etop.o
+ COBJS-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o
+ COBJS-$(CONFIG_KIRKWOOD_EGIGA) += kirkwood_egiga.o
+ COBJS-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o
+--- a/include/netdev.h
++++ b/include/netdev.h
+@@ -55,6 +55,7 @@ int fecmxc_initialize (bd_t *bis);
+ int ftmac100_initialize(bd_t *bits);
+ int greth_initialize(bd_t *bis);
+ void gt6426x_eth_initialize(bd_t *bis);
++int ifx_etop_initialize(bd_t *bis);
+ int inca_switch_initialize(bd_t *bis);
+ int kirkwood_egiga_initialize(bd_t *bis);
+ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
+@@ -82,6 +83,7 @@ int uec_standard_init(bd_t *bis);
+ int uli526x_initialize(bd_t *bis);
+ int sh_eth_initialize(bd_t *bis);
+ int dm9000_initialize(bd_t *bis);
++int lq_eth_initialize(bd_t * bis);
+ 
+ /* Boards with PCI network controllers can call this from their board_eth_init()
+  * function to initialize whatever's on board.
diff --git a/package/uboot-lantiq/patches/200-portability.patch b/package/uboot-lantiq/patches/200-portability.patch
new file mode 100644
index 000000000..ae38ad68e
--- /dev/null
+++ b/package/uboot-lantiq/patches/200-portability.patch
@@ -0,0 +1,31 @@
+--- a/tools/kwbimage.c
++++ b/tools/kwbimage.c
+@@ -206,6 +206,28 @@ INVL_DATA:
+ 	exit (EXIT_FAILURE);
+ }
+ 
++#ifndef __GLIBC__
++static ssize_t
++getline(char **line, size_t *len, FILE *fd)
++{
++	char *tmp;
++	int tmplen;
++
++	tmp = fgetln(fd, &tmplen);
++	if (!tmp)
++		return -1;
++
++	if (!*line || tmplen > *len) {
++		*len = tmplen + 1;
++		*line = realloc(*line, *len);
++	}
++
++	strncpy(*line, tmp, tmplen);
++	line[tmplen] = 0;
++	return tmplen;
++}
++#endif
++
+ /*
+  * this function sets the kwbimage header by-
+  * 	1. Abstracting input command line arguments data