fixes ifxmips uboot compile, adds uart uploadable image and fix for wippies homebox flash

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17856 3c298f89-4303-0410-b956-a3cf2f4a3e73

5 files changed, 296 insertions, 3 deletions

diff --git a/package/uboot-ifxmips/files/board/ifx/danube/config.mk b/package/uboot-ifxmips/files/board/ifx/danube/config.mk
index e6fcbc659..88680e14f 100644
--- a/package/uboot-ifxmips/files/board/ifx/danube/config.mk
+++ b/package/uboot-ifxmips/files/board/ifx/danube/config.mk
@@ -24,7 +24,7 @@
 #
 # Danube board with MIPS 24Kec CPU core
 #boot from ebu
-TEXT_BASE = 0xB0000000
+#TEXT_BASE = 0xB0000000
 BOOTSTRAP_TEXT_BASE = 0xB0000000
 
 #boot from ram
diff --git a/package/uboot-ifxmips/files/board/ifx/danube/flash.c b/package/uboot-ifxmips/files/board/ifx/danube/flash.c
index 587c072d1..f8a543dbe 100644
--- a/package/uboot-ifxmips/files/board/ifx/danube/flash.c
+++ b/package/uboot-ifxmips/files/board/ifx/danube/flash.c
@@ -720,7 +720,9 @@ int	flash_erase (flash_info_t *info, int s_first, int s_last)
 
 	(*DANUBE_EBU_BUSCON0)|=0x80000000;	// disable writing
 	(*DANUBE_EBU_BUSCON1)|=0x80000000;	// disable writing
- 
+
+	flash_reset(info);	/* Homebox Black with JS28F128J3D75 had trouble reading after erase */
+
 	printf (" done\n");
 	return rcode;
 }
diff --git a/package/uboot-ifxmips/files/danube_ref_ddr166.conf b/package/uboot-ifxmips/files/danube_ref_ddr166.conf
new file mode 100755
index 000000000..351d6a108
--- /dev/null
+++ b/package/uboot-ifxmips/files/danube_ref_ddr166.conf
@@ -0,0 +1,134 @@
+ 0xbf800060  0x7
+ 0xbf800010  0x0
+ 0xbf800020  0x0
+ 0xbf800200  0x02
+ 0xbf800210  0x0
+
+;REG32(MC_DC0) = 0x00001B1B;
+ 0xbf801000  0x1b1b
+;REG32(MC_DC1) = 0x00000000;
+ 0xbf801010  0x0
+;REG32(MC_DC2) = 0x00000000;
+ 0xbf801020  0x0
+;REG32(MC_DC3) = 0x00000000;
+ 0xbf801030  0x0
+;REG32(MC_DC4) = 0x00000000;
+ 0xbf801040  0x0
+;REG32(MC_DC5) = 0x00000200;
+ 0xbf801050  0x200
+;REG32(MC_DC6) = 0x00000306;
+; 0xbf801060  0x0306
+ 0xbf801060  0x0605
+;REG32(MC_DC7) = 0x00000303;
+ 0xbf801070  0x302
+; 0xbf801070  0x0203
+;REG32(MC_DC8) = 0x00000102;
+ 0xbf801080  0x102
+;REG32(MC_DC9) = 0x0000070A;
+ 0xbf801090  0x70a
+; 0xbf801090  0x608
+;REG32(MC_DC10) = 0x00000203;
+ 0xbf8010a0  0x203
+;REG32(MC_DC11) = 0x00000C02;
+ 0xbf8010b0  0xc02
+; 0xbf8010b0  0x0a02
+;REG32(MC_DC12) = 0x000001C8;
+ 0xbf8010c0  0x1c8
+;REG32(MC_DC13) = 0x00000001;
+ 0xbf8010d0  0x1
+;REG32(MC_DC14) = 0x00000000;
+ 0xbf8010e0  0x0
+;REG32(MC_DC15) = 0x00000F5F;
+; 0xbf8010f0  0xf5f
+ 0xbf8010f0  0xf3c
+;REG32(MC_DC16) = 0x0000C800;
+ 0xbf801100  0xc800
+;REG32(MC_DC17) = 0x0000000D; 
+; 0xbf801110  0xd
+ 0xbf801110  0xd
+;REG32(MC_DC18) = 0x00000300;
+ 0xbf801120  0x300
+;REG32(MC_DC19) = 0x00000300;
+; 0xbf801130  0x300
+ 0xbf801130  0x200
+;REG32(MC_DC20) = 0x00000A04;
+; 0xbf801140  0xa04
+ 0xbf801140  0xa04
+;REG32(MC_DC21) = 0x00001c00;
+ 0xbf801150  0xd00
+; 0xbf801150  0x1f00
+;REG32(MC_DC22) = 0x00001E1E;
+ 0xbf801160  0xd0d
+; 0xbf801160  0x1f1f
+;REG32(MC_DC23) = 0x00000000;
+ 0xbf801170  0x0
+;//Disable ECC
+;REG32(MC_DC24) = 0x0000007F;
+; 0xbf801180  0x7f
+ 0xbf801180  0x062
+; 0xbf801180  0x37f
+;REG32(MC_DC25) = 0x00000000;
+ 0xbf801190  0x0
+;REG32(MC_DC26) = 0x00000000;
+ 0xbf8011a0  0x0
+;REG32(MC_DC27) = 0x00000000;
+ 0xbf8011b0  0x0
+;REG32(MC_DC28) = 0x00000A24;
+; 0xbf8011c0  0xa24
+ 0xbf8011c0  0x510
+;REG32(MC_DC29) = 0x00002D89;
+ 0xbf8011d0  0x2d89
+; 0xbf8011d0  0x2d92
+;REG32(MC_DC30) = 0x00000022;
+ 0xbf8011e0  0x8300
+; 0xbf8011e0  0x8235
+;REG32(MC_DC31) = 0x00000000;
+ 0xbf8011f0  0x0
+;REG32(MC_DC32) = 0x00000000;
+ 0xbf801200  0x0
+;REG32(MC_DC33) = 0x00000000;
+ 0xbf801210  0x0
+;REG32(MC_DC34) = 0x00000000;
+ 0xbf801220  0x0
+;REG32(MC_DC35) = 0x00000000;
+ 0xbf801230  0x0
+;REG32(MC_DC36) = 0x00000000;
+ 0xbf801240  0x0
+;REG32(MC_DC37) = 0x00000000;
+ 0xbf801250  0x0
+;REG32(MC_DC38) = 0x00000000;
+ 0xbf801260  0x0
+;REG32(MC_DC39) = 0x00000000;
+ 0xbf801270  0x0
+;REG32(MC_DC40) = 0x00000000;
+ 0xbf801280  0x0
+;REG32(MC_DC41) = 0x00000000;
+ 0xbf801290  0x0
+;REG32(MC_DC42) = 0x00000000;
+ 0xbf8012a0  0x0
+;REG32(MC_DC43) = 0x00000000;
+ 0xbf8012b0  0x0
+;REG32(MC_DC44) = 0x00000000;
+ 0xbf8012c0  0x0
+;REG32(MC_DC45) = 0x00000600;
+ 0xbf8012d0  0x500
+;REG32(MC_DC46) = 0x00000000;
+ 0xbf8012e0  0x0
+
+ 0xbf800060  0x05
+ 0xbf801030  0x100
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/package/uboot-ifxmips/files/gct b/package/uboot-ifxmips/files/gct
new file mode 100755
index 000000000..09b126159
--- /dev/null
+++ b/package/uboot-ifxmips/files/gct
@@ -0,0 +1,157 @@
+#!/usr/bin/perl
+my $aline;
+my $lineid;
+my $length;
+my $address;
+my @bytes;
+my $addstr;
+my $chsum=0;
+my $count=0;
+my $firstime=1;
+my $i;
+my $currentaddr;
+my $tmp;
+my $holder="";
+my $loadaddr;
+
+if(@ARGV < 2){
+	print "\n not enough arguments";
+	print "\n Syntax: ./program_SDRAM input output\n";
+}
+
+open(INFILE1, "<$ARGV[0]") || die("\ninput open fail\n");
+open(INFILE2, "<$ARGV[1]") || die("\ninput open fail\n");
+open(OUTFILE, ">$ARGV[2]") || die("\nOutput file open fail\n");
+
+$i=0;
+while ($line = <INFILE1>){
+            if($line=~/\w/){
+	     if($line!~/[;#\*]/){
+                  if($i eq 0){
+		  printf OUTFILE ("33333333");
+		  }
+		  chomp($line);
+		  $line=~s/\t//;
+		  @array=split(/ +/,$line);
+                  $j=0;
+		  while(@array[$j]!~/\w/)
+		  {
+                    $j=$j+1;
+
+		  }
+		  $addr=@array[$j];
+	          $regval=@array[$j+1];
+                  $addr=~s/0x//;
+                  $regval=~s/0x//;
+		  printf OUTFILE ("%08x%08x",hex($addr),hex($regval));
+                  $i=$i+1;
+		  if($i eq 8)
+		  {
+                      $i=0;
+		      printf OUTFILE ("\n");
+		  }
+
+               }
+             }
+
+	    }
+
+        while($i lt 8 && $i gt 0){
+                   printf OUTFILE "00"x8;
+		   $i=$i+1;
+		   }
+        if($i eq 8){
+	printf OUTFILE ("\n");
+        }
+
+while($aline=<INFILE2>){
+	$aline=uc($aline);
+	chomp($aline);
+	next if(($aline=~/^S0/) || ($aline=~/^S7/));
+	($lineid, $length, $address, @bytes) = unpack"A2A2A8"."A2"x300, $aline;
+	$length = hex($length);
+	$address = hex($address);
+	$length -=5;
+	$i=0;
+
+	while($length>0){
+		if($firstime==1){
+				$addstr = sprintf("%x", $address);
+				$addstr = "0"x(8-length($addstr)).$addstr;
+				print OUTFILE $addstr;
+				addchsum($addstr);
+				$firstime=0;
+				$currentaddr=$address;
+				$loadaddr = $addstr;
+		}
+		else{
+			if($count==64){
+				$addstr = sprintf("%x", $currentaddr);
+				$addstr = "0"x(8-length($addstr)).$addstr;
+				print OUTFILE $addstr;
+				addchsum($addstr);
+				$count=0;
+			}
+		}
+		while($count<64){
+		        $bytes[$i]=~tr/ABCDEF/abcdef/;
+			print OUTFILE "$bytes[$i]";
+			addchsum($bytes[$i]);
+			$i++;
+			$count++;
+			$length--;
+			last if($length==0);
+		}
+		if($count==64){
+			print OUTFILE "\n";
+			#print OUTFILE "\r";
+			$currentaddr+=64;
+		}
+	}
+}
+if($count != 64){
+	$tmp = "00";
+	for($i=0;$i<(64-$count);$i++){
+		print OUTFILE "00";
+		addchsum($tmp);
+	}
+	print OUTFILE "\n";
+	#print OUTFILE "\r";
+}
+
+
+print OUTFILE "11"x4;
+use integer;
+$chsum=$chsum & 0xffffffff;
+$chsum = sprintf("%X", $chsum);
+$chsum = "0"x(8-length($chsum)).$chsum;
+$chsum =~tr/ABCDEF/abcdef/;
+print OUTFILE $chsum;
+print OUTFILE "00"x60;
+print OUTFILE "\n";
+#print OUTFILE "\r";
+
+print OUTFILE "99"x4;
+print OUTFILE $loadaddr;
+print OUTFILE "00"x60;
+print OUTFILE "\n";
+#print OUTFILE "\r";
+
+
+close OUTFILE;
+#END of Program
+
+
+
+sub addchsum{
+	my $cc=$_[0];
+	$holder=$holder.$cc;
+	if(length($holder)==8){
+		$holder = hex($holder);
+		$chsum+=$holder;
+		$holder="";
+	}
+}
+#END
+
+
diff --git a/package/uboot-ifxmips/files/include/configs/danube.h b/package/uboot-ifxmips/files/include/configs/danube.h
index bbf3dc47e..ed95f3361 100644
--- a/package/uboot-ifxmips/files/include/configs/danube.h
+++ b/package/uboot-ifxmips/files/include/configs/danube.h
@@ -31,7 +31,7 @@
 #define  USE_REFERENCE_BOARD
 //#define   USE_EVALUATION_BOARD
 
-#define   DANUBE_BOOT_FROM_EBU
+//#define   DANUBE_BOOT_FROM_EBU
 #define   DANUBE_USE_DDR_RAM
 
 #ifdef DANUBE_USE_DDR_RAM