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authornbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2011-07-03 01:08:35 +0000
committernbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2011-07-03 01:08:35 +0000
commit75ace030b995e2e4056aba6f5602fabf13c700d7 (patch)
treedd053d6607b262aa90f5cd1b7d1630352ec35138 /package/mac80211/patches
parent4139f93eb6179aaf827412135db2e18dcc3c3506 (diff)
ath5k: disable the 32 khz sleep clock, atheros also does this, might improve stability
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27366 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'package/mac80211/patches')
-rw-r--r--package/mac80211/patches/446-ath5k_disable_32khz_clock.patch18
1 files changed, 18 insertions, 0 deletions
diff --git a/package/mac80211/patches/446-ath5k_disable_32khz_clock.patch b/package/mac80211/patches/446-ath5k_disable_32khz_clock.patch
new file mode 100644
index 000000000..21bf03716
--- /dev/null
+++ b/package/mac80211/patches/446-ath5k_disable_32khz_clock.patch
@@ -0,0 +1,18 @@
+--- a/drivers/net/wireless/ath/ath5k/reset.c
++++ b/drivers/net/wireless/ath/ath5k/reset.c
+@@ -1287,15 +1287,6 @@ int ath5k_hw_reset(struct ath5k_hw *ah,
+ */
+ ath5k_hw_dma_init(ah);
+
+-
+- /* Enable 32KHz clock function for AR5212+ chips
+- * Set clocks to 32KHz operation and use an
+- * external 32KHz crystal when sleeping if one
+- * exists */
+- if (ah->ah_version == AR5K_AR5212 &&
+- op_mode != NL80211_IFTYPE_AP)
+- ath5k_hw_set_sleep_clock(ah, true);
+-
+ /*
+ * Disable beacons and reset the TSF
+ */