split kernel patches into board dependend and generic

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@1122 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 0 insertions, 147 deletions

diff --git a/openwrt/target/linux/linux-2.4/patches/007-bcm94710_mmu.patch b/openwrt/target/linux/linux-2.4/patches/007-bcm94710_mmu.patch
deleted file mode 100644
index 9fd0162ed..000000000
--- a/openwrt/target/linux/linux-2.4/patches/007-bcm94710_mmu.patch
+++ /dev/null
@@ -1,147 +0,0 @@
-diff -urN linux.old/arch/mips/mm/c-r4k.c linux.dev/arch/mips/mm/c-r4k.c
---- linux.old/arch/mips/mm/c-r4k.c	2005-05-28 17:42:06.000000000 +0200
-+++ linux.dev/arch/mips/mm/c-r4k.c	2005-05-29 18:26:34.000000000 +0200
-@@ -14,6 +14,12 @@
- #include <linux/mm.h>
- #include <linux/bitops.h>
- 
-+#ifdef CONFIG_BCM4710
-+#include "../bcm947xx/include/typedefs.h"
-+#include "../bcm947xx/include/sbconfig.h"
-+#include <asm/paccess.h>
-+#endif
-+
- #include <asm/bcache.h>
- #include <asm/bootinfo.h>
- #include <asm/cacheops.h>
-@@ -390,6 +396,11 @@
- 			addr = start & ~(dc_lsize - 1);
- 			aend = (end - 1) & ~(dc_lsize - 1);
- 
-+#ifdef CONFIG_BCM4710
-+			BCM4710_FILL_TLB(addr);
-+			BCM4710_FILL_TLB(aend);
-+#endif
-+
- 			while (1) {
- 				/* Hit_Writeback_Inv_D */
- 				protected_writeback_dcache_line(addr);
-@@ -509,6 +520,10 @@
- 		R4600_HIT_CACHEOP_WAR_IMPL;
- 		a = addr & ~(dc_lsize - 1);
- 		end = (addr + size - 1) & ~(dc_lsize - 1);
-+#ifdef CONFIG_BCM4710
-+		BCM4710_FILL_TLB(a);
-+		BCM4710_FILL_TLB(end);
-+#endif
- 		while (1) {
- 			flush_dcache_line(a);	/* Hit_Writeback_Inv_D */
- 			if (a == end)
-@@ -576,6 +591,10 @@
- 	unsigned long ic_lsize = current_cpu_data.icache.linesz;
- 	unsigned long dc_lsize = current_cpu_data.dcache.linesz;
- 
-+#ifdef CONFIG_BCM4710
-+	BCM4710_PROTECTED_FILL_TLB(addr);
-+	BCM4710_PROTECTED_FILL_TLB(addr + 4);
-+#endif
- 	R4600_HIT_CACHEOP_WAR_IMPL;
- 	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
- 	protected_flush_icache_line(addr & ~(ic_lsize - 1));
-diff -urN linux.old/include/asm-mips/r4kcache.h linux.dev/include/asm-mips/r4kcache.h
---- linux.old/include/asm-mips/r4kcache.h	2005-05-28 17:42:06.000000000 +0200
-+++ linux.dev/include/asm-mips/r4kcache.h	2005-05-29 18:34:46.000000000 +0200
-@@ -15,6 +15,25 @@
- #include <asm/asm.h>
- #include <asm/cacheops.h>
- 
-+#ifdef CONFIG_BCM4710
-+#define BCM4710_DUMMY_RREG() (((sbconfig_t *)(KSEG1ADDR(SB_ENUM_BASE + SBCONFIGOFF)))->sbimstate)
-+
-+#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
-+#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
-+
-+#define cache_op(op,addr)						\
-+	BCM4710_DUMMY_RREG();						\
-+	__asm__ __volatile__(						\
-+	"	.set	noreorder				\n"	\
-+	"	.set	mips3\n\t				\n"	\
-+	"	cache	%0, %1					\n"	\
-+	"	.set	mips0					\n"	\
-+	"	.set	reorder"					\
-+	:								\
-+	: "i" (op), "m" (*(unsigned char *)(addr)))
-+
-+#else
-+
- #define cache_op(op,addr)						\
- 	__asm__ __volatile__(						\
- 	"	.set	noreorder				\n"	\
-@@ -24,6 +43,8 @@
- 	"	.set	reorder"					\
- 	:								\
- 	: "i" (op), "m" (*(unsigned char *)(addr)))
-+#endif
-+
- 
- static inline void flush_icache_line_indexed(unsigned long addr)
- {
-@@ -47,6 +68,10 @@
- 
- static inline void flush_dcache_line(unsigned long addr)
- {
-+
-+#ifdef CONFIG_BCM4710	
-+	BCM4710_DUMMY_RREG();
-+#endif
- 	cache_op(Hit_Writeback_Inv_D, addr);
- }
- 
-@@ -196,7 +221,13 @@
- 	unsigned long start = page;
- 	unsigned long end = start + PAGE_SIZE;
- 
-+#ifdef CONFIG_BCM4710	
-+	BCM4710_FILL_TLB(start);
-+#endif
- 	do {
-+#ifdef CONFIG_BCM4710	
-+		BCM4710_DUMMY_RREG();
-+#endif
- 		cache16_unroll32(start,Hit_Invalidate_I);
- 		start += 0x200;
- 	} while (start < end);
-@@ -291,8 +322,12 @@
- 	unsigned long ws, addr;
- 
- 	for (ws = 0; ws < ws_end; ws += ws_inc) 
--		for (addr = start; addr < end; addr += 0x400) 
-+		for (addr = start; addr < end; addr += 0x400) {
-+#ifdef CONFIG_BCM4710	
-+			BCM4710_DUMMY_RREG();
-+#endif
- 			cache32_unroll32(addr|ws,Index_Writeback_Inv_D);
-+		}
- }
- 
- static inline void blast_dcache32_page(unsigned long page)
-@@ -300,6 +335,9 @@
- 	unsigned long start = page;
- 	unsigned long end = start + PAGE_SIZE;
- 
-+#ifdef CONFIG_BCM4710	
-+	__asm__ __volatile__("nop;nop;nop;nop");
-+#endif
- 	do {
- 		cache32_unroll32(start,Hit_Writeback_Inv_D);
- 		start += 0x400;
-@@ -339,6 +377,9 @@
- 	unsigned long start = page;
- 	unsigned long end = start + PAGE_SIZE;
- 
-+#ifdef CONFIG_BCM4710	
-+	BCM4710_FILL_TLB(start);
-+#endif
- 	do {
- 		cache32_unroll32(start,Hit_Invalidate_I);
- 		start += 0x400;