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--- /dev/null
+++ b/include/asm-arm/arch-pxa/gumstix.h
@@ -0,0 +1,165 @@
+/*
+ * linux/include/asm-arm/arch-pxa/gumstix.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+/* BTRESET - Reset line to Bluetooth module, active low signal. */
+#define GPIO_GUMSTIX_BTRESET 7
+#define GPIO_GUMSTIX_BTRESET_MD (GPIO_GUMSTIX_BTRESET | GPIO_OUT)
+
+
+/* GPIOn - Input from MAX823 (or equiv), normalizing USB +5V
+ into a clean interrupt signal for determining cable presence
+ On the original gumstix, this is GPIO81, and GPIO83 needs to be defined as well.
+ On the gumstix F, this moves to GPIO17 and GPIO37 */
+/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
+ has detected a cable insertion; driven low otherwise. */
+
+#ifdef CONFIG_ARCH_GUMSTIX_ORIG
+
+#define GPIO_GUMSTIX_USB_GPIOn 81
+#define GPIO_GUMSTIX_USB_GPIOx 83
+
+#else
+
+#define GPIO_GUMSTIX_USB_GPIOn 35
+#define GPIO_GUMSTIX_USB_GPIOx 41
+
+#endif
+
+#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) /* usb state change */
+#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
+#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
+#define GPIO_GUMSTIX_USB_GPIOx_DIS_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN)
+
+
+/*
+ * SMC Ethernet definitions
+ * ETH_RST provides a hardware reset line to the ethernet chip
+ * ETH is the IRQ line in from the ethernet chip to the PXA
+ */
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_ETH0_RST 80
+#define GPIO_GUMSTIX_ETH0 36
+#else
+#define GPIO_GUMSTIX_ETH0_RST 32
+#define GPIO_GUMSTIX_ETH0 99
+#endif
+#define GPIO_GUMSTIX_ETH1_RST 52
+#define GPIO_GUMSTIX_ETH1 27
+
+#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
+#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
+
+#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
+#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
+
+
+/* CF reset line */
+#define GPIO8_CF_RESET 8
+#define GPIO97_CF_RESET 97
+#define GPIO110_CF_RESET 110
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_CF_RESET GPIO8_CF_RESET
+#else
+#define GPIO_GUMSTIX_CF_RESET GPIO97_CF_RESET
+#endif
+#define GPIO_GUMSTIX_CF_OLD_RESET GPIO110_CF_RESET
+
+
+/* CF signals shared by both sockets */
+#define GPIO_GUMSTIX_nPOE GPIO48_nPOE
+#define GPIO_GUMSTIX_nPWE GPIO49_nPWE
+#define GPIO_GUMSTIX_nPIOR GPIO50_nPIOR
+#define GPIO_GUMSTIX_nPIOW GPIO51_nPIOW
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1 GPIO52_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2 GPIO53_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL GPIO54_pSKTSEL
+#else
+#define GPIO_GUMSTIX_nPCE_1 GPIO102_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2 GPIO105_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL GPIO79_pSKTSEL
+#endif
+#define GPIO_GUMSTIX_nPREG GPIO55_nPREG
+#define GPIO_GUMSTIX_nPWAIT GPIO56_nPWAIT
+#define GPIO_GUMSTIX_nIOIS16 GPIO57_nIOIS16
+
+#define GPIO_GUMSTIX_nPOE_MD GPIO48_nPOE_MD
+#define GPIO_GUMSTIX_nPWE_MD GPIO49_nPWE_MD
+#define GPIO_GUMSTIX_nPIOR_MD GPIO50_nPIOR_MD
+#define GPIO_GUMSTIX_nPIOW_MD GPIO51_nPIOW_MD
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1_MD
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2_MD
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO54_pSKTSEL_MD
+#else
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1_MD
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2_MD
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO79_pSKTSEL_MD
+#endif
+#define GPIO_GUMSTIX_nPREG_MD GPIO55_nPREG_MD
+#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT_MD
+#define GPIO_GUMSTIX_nIOIS16_MD GPIO57_nIOIS16_MD
+
+/* CF slot 0 */
+#define GPIO4_nBVD1_0 4
+#define GPIO4_nSTSCHG_0 GPIO4_nBVD1_0
+#define GPIO11_nCD_0 11
+#define GPIO26_PRDY_nBSY_0 26
+
+#define GPIO111_nBVD1_0 111
+#define GPIO111_nSTSCHG_0 GPIO111_nBVD1_0
+#define GPIO104_nCD_0 104
+#define GPIO96_PRDY_nBSY_0 96
+#define GPIO109_PRDY_nBSY_0 109
+
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nBVD1_0 GPIO4_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO4_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO11_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO26_PRDY_nBSY_0
+#else
+#define GPIO_GUMSTIX_nBVD1_0 GPIO111_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO111_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO104_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO96_PRDY_nBSY_0
+#endif
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD GPIO109_PRDY_nBSY_0
+
+#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_0)
+#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_0)
+#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0)
+#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0_OLD)
+
+/* CF slot 1 */
+#define GPIO18_nBVD1_1 18
+#define GPIO18_nSTSCHG_1 GPIO18_nBVD1_1
+#define GPIO36_nCD_1 36
+#define GPIO27_PRDY_nBSY_1 27
+
+#define GPIO_GUMSTIX_nBVD1_1 GPIO18_nBVD1_1
+#define GPIO_GUMSTIX_nSTSCHG_1 GPIO18_nSTSCHG_1
+#define GPIO_GUMSTIX_nCD_1 GPIO36_nCD_1
+#define GPIO_GUMSTIX_PRDY_nBSY_1 GPIO27_PRDY_nBSY_1
+
+#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_1)
+#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_1)
+#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_1)
+
+/* CF GPIO line modes */
+#define GPIO_GUMSTIX_CF_RESET_MD ( GPIO_GUMSTIX_CF_RESET | GPIO_OUT )
+#define GPIO_GUMSTIX_CF_OLD_RESET_MD ( GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT )
+#define GPIO_GUMSTIX_nSTSCHG_0_MD ( GPIO_GUMSTIX_nSTSCHG_0 | GPIO_IN )
+#define GPIO_GUMSTIX_nCD_0_MD ( GPIO_GUMSTIX_nCD_0 | GPIO_IN )
+#define GPIO_GUMSTIX_PRDY_nBSY_0_MD ( GPIO_GUMSTIX_PRDY_nBSY_0 | GPIO_IN )
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD ( GPIO_GUMSTIX_PRDY_nBSY_0_OLD | GPIO_IN )
+#define GPIO_GUMSTIX_nSTSCHG_1_MD ( GPIO_GUMSTIX_nSTSCHG_1 | GPIO_IN )
+#define GPIO_GUMSTIX_nCD_1_MD ( GPIO_GUMSTIX_nCD_1 | GPIO_IN )
+#define GPIO_GUMSTIX_PRDY_nBSY_1_MD ( GPIO_GUMSTIX_PRDY_nBSY_1 | GPIO_IN )
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