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--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -390,6 +390,8 @@ config ARCH_CNS21XX
select CPU_FA526
select PLAT_FA
select PLAT_FA_TIME
+ select PLAT_FA_GPIO
+ select ARCH_REQUIRE_GPIOLIB
select ARM_L1_CACHE_SHIFT_4
help
Support for Cavium Networks CNS21xx family.
--- a/arch/arm/mach-cns21xx/common.h
+++ b/arch/arm/mach-cns21xx/common.h
@@ -13,6 +13,7 @@
void cns21xx_restart(char mode, const char *cmd);
void cns21xx_map_io(void);
void cns21xx_init_irq(void);
+void cns21xx_gpio_init(void);
extern struct sys_timer cns21xx_timer;
--- /dev/null
+++ b/arch/arm/mach-cns21xx/gpio.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, Version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <plat/gpio.h>
+
+#include <mach/cns21xx.h>
+#include <mach/irqs.h>
+
+static struct fa_gpio_chip cns21xx_gpio_chips[] = {
+ {
+ .gpio_chip = {
+ .label = "GPIOA",
+ .base = 0,
+ .ngpio = 32,
+ },
+
+ .map_base = CNS21XX_GPIOA_BASE,
+ .irq_base = CNS21XX_GPIO_IRQ_BASE,
+ }, {
+ .gpio_chip = {
+ .label = "GPIOB",
+ .base = 32,
+ .ngpio = 32,
+ },
+
+ .map_base = CNS21XX_GPIOB_BASE,
+ .irq_base = CNS21XX_GPIO_IRQ_BASE + 32,
+ }
+};
+
+static struct fa_gpio_data cns21xx_gpio_data = {
+ .chips = cns21xx_gpio_chips,
+ .nchips = ARRAY_SIZE(cns21xx_gpio_chips),
+ .irq = CNS21XX_IRQ_GPIO,
+};
+
+void __init cns21xx_gpio_init(void)
+{
+ fa_gpio_init(&cns21xx_gpio_data);
+}
--- /dev/null
+++ b/arch/arm/mach-cns21xx/include/mach/gpio.h
@@ -0,0 +1,2 @@
+/* empty */
+
--- a/arch/arm/mach-cns21xx/Makefile
+++ b/arch/arm/mach-cns21xx/Makefile
@@ -4,7 +4,7 @@
# Object file lists.
-obj-y := core.o devices.o irq.o mm.o time.o
+obj-y := core.o devices.o gpio.o irq.o mm.o time.o
# machine specific files
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