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From 4c960910e2fb3a301ee4a504fa6b2c5204efeab0 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Tue, 29 Jan 2013 08:27:03 +0000
Subject: [PATCH] MIPS: AR724x: Fix AR724X_PCI_MEM_SIZE
commit 4c960910e2fb3a301ee4a504fa6b2c5204efeab0 upstream.
The base address of the PCI memory is
0x10000000 and the base address of the
PCI configuration space is 0x14000000
on the AR724x SoCs.
The AR724X_PCI_MEM_SIZE is defined as
0x08000000 which is wrong because that
overlaps with the configuration space.
The patch fixes the value of the
AR724X_PCI_MEM_SIZE constant, in order
to avoid this resource conflicts.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4872/
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
arch/mips/pci/pci-ar724x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -21,7 +21,7 @@
#define AR724X_PCI_CTRL_SIZE 0x100
#define AR724X_PCI_MEM_BASE 0x10000000
-#define AR724X_PCI_MEM_SIZE 0x08000000
+#define AR724X_PCI_MEM_SIZE 0x04000000
#define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c
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