summaryrefslogtreecommitdiffstats
path: root/target/linux/ar71xx/patches-3.2/304-spi-ap83-3.2-fixes.patch
blob: 7a9d686f24739f19ebc75c83a7d15a69b1b0b3ee (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
--- a/drivers/spi/spi-ap83.c
+++ b/drivers/spi/spi-ap83.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/spinlock.h>
@@ -21,8 +22,7 @@
 #include <linux/bitops.h>
 #include <linux/gpio.h>
 
-#include <asm/mach-ar71xx/ar71xx.h>
-#include <asm/mach-ar71xx/platform.h>
+#include <asm/mach-ath79/ath79.h>
 
 #define DRV_DESC	"Atheros AP83 board SPI Controller driver"
 #define DRV_VERSION	"0.1.0"
@@ -106,7 +106,7 @@ static void ap83_spi_chipselect(struct s
 	dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1);
 
 	if (on) {
-		ar71xx_flash_acquire();
+		ath79_flash_acquire();
 
 		sp->addr = 0;
 		ap83_spi_rr(sp, sp->addr);
@@ -114,7 +114,7 @@ static void ap83_spi_chipselect(struct s
 		gpio_set_value(AP83_SPI_GPIO_CS, 0);
 	} else {
 		gpio_set_value(AP83_SPI_GPIO_CS, 1);
-		ar71xx_flash_release();
+		ath79_flash_release();
 	}
 }
 
@@ -127,7 +127,7 @@ static void ap83_spi_chipselect(struct s
 
 #define EXPAND_BITBANG_TXRX
 #include <linux/spi/spi_bitbang.h>
-#include "spi_bitbang_txrx.h"
+#include "spi-bitbang-txrx.h"
 
 static u32 ap83_spi_txrx_mode0(struct spi_device *spi,
 			       unsigned nsecs, u32 word, u8 bits)