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/*
* Atheros AR71xx SoC specific platform data definitions
*
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef __ASM_MACH_AR71XX_PLATFORM_H
#define __ASM_MACH_AR71XX_PLATFORM_H
#include <linux/if_ether.h>
#include <linux/skbuff.h>
#include <linux/phy.h>
#include <linux/spi/spi.h>
struct ag71xx_platform_data {
phy_interface_t phy_if_mode;
u32 phy_mask;
int speed;
int duplex;
u32 reset_bit;
u32 mii_if;
u8 mac_addr[ETH_ALEN];
u8 has_gbit:1;
u8 is_ar91xx:1;
void (* ddr_flush)(void);
void (* set_pll)(u32 pll);
};
struct ag71xx_mdio_platform_data {
u32 phy_mask;
};
struct ar71xx_ehci_platform_data {
u8 is_ar91xx;
};
struct ar71xx_spi_platform_data {
unsigned bus_num;
unsigned num_chipselect;
u32 (*get_ioc_base)(u8 chip_select, int cs_high, int is_on);
};
#define AR71XX_SPI_CS_INACTIVE 0
#define AR71XX_SPI_CS_ACTIVE 1
#endif /* __ASM_MACH_AR71XX_PLATFORM_H */
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