summaryrefslogtreecommitdiffstats
path: root/target/linux/adm5120/files/arch/mips/adm5120/boards/compex.c
blob: 5cf858c294a9a90a09e2f537fcad25311307a511 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
/*
 *  $Id$
 *
 *  Compex boards
 *
 *  Copyright (C) 2007-2008 OpenWrt.org
 *  Copyright (C) 2007-2008 Gabor Juhos <juhosg at openwrt.org>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License version 2 as published
 *  by the Free Software Foundation.
 *
 */

#include <linux/kernel.h>
#include <linux/init.h>

#include <asm/bootinfo.h>
#include <asm/gpio.h>

#include <adm5120_board.h>
#include <adm5120_platform.h>
#include <adm5120_irq.h>

#define NP27G_GPIO_DEV_MASK	(1 << ADM5120_GPIO_PIN5)
#define NP28G_GPIO_DEV_MASK	( 1 << ADM5120_GPIO_PIN5 \
				| 1 << ADM5120_GPIO_PIN4)

#define WP54_GPIO_DEV_MASK	( 1 << ADM5120_GPIO_PIN5 \
				| 1 << ADM5120_GPIO_PIN3)

static struct adm5120_pci_irq wp54_pci_irqs[] __initdata = {
	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
};

static struct adm5120_pci_irq np28g_pci_irqs[] __initdata = {
	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
	PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI0),
	PCIIRQ(3, 1, 2, ADM5120_IRQ_PCI1),
	PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2)
};

static struct mtd_partition wp54g_wrt_partitions[] = {
	{
		.name	= "cfe",
		.offset	= 0,
		.size	= 0x050000,
		.mask_flags = MTD_WRITEABLE,
	} , {
		.name	= "trx",
		.offset	= MTDPART_OFS_APPEND,
		.size	= 0x3A0000,
	} , {
		.name	= "nvram",
		.offset	= MTDPART_OFS_APPEND,
		.size	= 0x010000,
	}
};

static struct platform_device *np2xg_devices[] __initdata = {
	&adm5120_flash0_device,
	&adm5120_hcd_device,
};

static struct platform_device *wp54_devices[] __initdata = {
	&adm5120_flash0_device,
	&adm5120_buttons_device,
};

unsigned char np27g_vlans[6] __initdata = {
	/* FIXME: untested */
	0x41, 0x42, 0x44, 0x48, 0x50, 0x00
};

unsigned char np28g_vlans[6] __initdata = {
	0x50, 0x42, 0x44, 0x48, 0x00, 0x00
};

unsigned char wp54_vlans[6] __initdata = {
	0x41, 0x42, 0x00, 0x00, 0x00, 0x00
};

/*--------------------------------------------------------------------------*/

static void switch_bank_gpio5(unsigned bank)
{
	switch (bank) {
	case 0:
		gpio_set_value(ADM5120_GPIO_PIN5, 0);
		break;
	case 1:
		gpio_set_value(ADM5120_GPIO_PIN5, 1);
		break;
	}
}

static void wp54_reset(void)
{
	gpio_set_value(ADM5120_GPIO_PIN3, 0);
}

static void np28g_reset(void)
{
	gpio_set_value(ADM5120_GPIO_PIN4, 0);
}

static void __init np27g_setup(void)
{
	gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
	gpio_direction_output(ADM5120_GPIO_PIN5, 0);

	/* setup data for flash0 device */
	adm5120_flash0_data.switch_bank = switch_bank_gpio5;
	adm5120_gpiodev_resource.start &= ~NP27G_GPIO_DEV_MASK;

	/* TODO: setup mac address */
}

static void __init np28g_setup(void)
{
	gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
	gpio_direction_output(ADM5120_GPIO_PIN5, 0);

	gpio_request(ADM5120_GPIO_PIN4, NULL); /* for system reset */
	gpio_direction_output(ADM5120_GPIO_PIN4, 1);

	/* setup data for flash0 device */
	adm5120_flash0_data.switch_bank = switch_bank_gpio5;

	adm5120_gpiodev_resource.start &= ~NP28G_GPIO_DEV_MASK;

	/* TODO: setup mac address */
}

static void __init wp54_setup(void)
{
	gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
	gpio_direction_output(ADM5120_GPIO_PIN5, 0);

	gpio_request(ADM5120_GPIO_PIN3, NULL); /* for system reset */
	gpio_direction_output(ADM5120_GPIO_PIN3, 1);

	/* setup data for flash0 device */
	adm5120_flash0_data.switch_bank = switch_bank_gpio5;

	adm5120_buttons_data.nbuttons = 1;
	adm5120_buttons[0].desc = "reset button";
	adm5120_buttons[0].gpio = ADM5120_GPIO_PIN2;

	adm5120_gpiodev_resource.start &= ~WP54_GPIO_DEV_MASK;

	/* TODO: setup mac address */
}

static void __init wp54_wrt_setup(void)
{
	wp54_setup();

	adm5120_flash0_data.nr_parts = ARRAY_SIZE(wp54g_wrt_partitions);
	adm5120_flash0_data.parts = wp54g_wrt_partitions;

	/* TODO: setup mac address */
}

/*--------------------------------------------------------------------------*/

ADM5120_BOARD_START(NP27G, "Compex NetPassage 27G")
	.board_setup	= np27g_setup,
	.eth_num_ports	= 5,
	.eth_vlans	= np27g_vlans,
	.num_devices	= ARRAY_SIZE(np2xg_devices),
	.devices	= np2xg_devices,
	/* TODO: add PCI IRQ map */
ADM5120_BOARD_END

ADM5120_BOARD_START(NP28G, "Compex NetPassage 28G")
	.board_setup	= np28g_setup,
	.board_reset	= np28g_reset,
	.eth_num_ports	= 4,
	.eth_vlans	= np28g_vlans,
	.num_devices	= ARRAY_SIZE(np2xg_devices),
	.devices	= np2xg_devices,
	.pci_nr_irqs	= ARRAY_SIZE(np28g_pci_irqs),
	.pci_irq_map	= np28g_pci_irqs,
ADM5120_BOARD_END

ADM5120_BOARD_START(WP54AG, "Compex WP54AG")
	.board_setup	= wp54_setup,
	.board_reset	= wp54_reset,
	.eth_num_ports	= 2,
	.eth_vlans	= wp54_vlans,
	.num_devices	= ARRAY_SIZE(wp54_devices),
	.devices	= wp54_devices,
	.pci_nr_irqs	= ARRAY_SIZE(wp54_pci_irqs),
	.pci_irq_map	= wp54_pci_irqs,
ADM5120_BOARD_END

ADM5120_BOARD_START(WP54G, "Compex WP54G")
	.board_setup	= wp54_setup,
	.board_reset	= wp54_reset,
	.eth_num_ports	= 2,
	.eth_vlans	= wp54_vlans,
	.num_devices	= ARRAY_SIZE(wp54_devices),
	.devices	= wp54_devices,
	.pci_nr_irqs	= ARRAY_SIZE(wp54_pci_irqs),
	.pci_irq_map	= wp54_pci_irqs,
ADM5120_BOARD_END

ADM5120_BOARD_START(WP54G_WRT, "Compex WP54G-WRT")
	.board_setup	= wp54_wrt_setup,
	.board_reset	= wp54_reset,
	.eth_num_ports	= 2,
	.eth_vlans	= wp54_vlans,
	.num_devices	= ARRAY_SIZE(wp54_devices),
	.devices	= wp54_devices,
	.pci_nr_irqs	= ARRAY_SIZE(wp54_pci_irqs),
	.pci_irq_map	= wp54_pci_irqs,
ADM5120_BOARD_END

ADM5120_BOARD_START(WPP54AG, "Compex WPP54AG")
	.board_setup	= wp54_setup,
	.board_reset	= wp54_reset,
	.eth_num_ports	= 2,
	.eth_vlans	= wp54_vlans,
	.num_devices	= ARRAY_SIZE(wp54_devices),
	.devices	= wp54_devices,
	.pci_nr_irqs	= ARRAY_SIZE(wp54_pci_irqs),
	.pci_irq_map	= wp54_pci_irqs,
ADM5120_BOARD_END

ADM5120_BOARD_START(WPP54G, "Compex WPP54G")
	.board_setup	= wp54_setup,
	.board_reset	= wp54_reset,
	.eth_num_ports	= 2,
	.eth_vlans	= wp54_vlans,
	.num_devices	= ARRAY_SIZE(wp54_devices),
	.devices	= wp54_devices,
	.pci_nr_irqs	= ARRAY_SIZE(wp54_pci_irqs),
	.pci_irq_map	= wp54_pci_irqs,
ADM5120_BOARD_END