summaryrefslogtreecommitdiffstats
path: root/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c
blob: 91dae89999d50dccbcb142915b6b3cf8cc10c604 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
/*
 *	Copyright (C) ADMtek Incorporated.
 *	Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
 *	Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
 *	Copyright (C) 2007 OpenWrt.org
 */

#include <linux/autoconf.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>

#include <adm5120_defs.h>

volatile u32* pci_config_address_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_ADDR);
volatile u32* pci_config_data_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_DATA);

#define PCI_ENABLE 0x80000000

static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
                           int size, uint32_t *val)
{
	*pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
	    ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
	switch (size) {
		case 1:
			*val = ((*pci_config_data_reg)>>((where&3)<<3))&0xff;
			break;
		case 2:
			*val = ((*pci_config_data_reg)>>((where&3)<<3))&0xffff;
			break;
		default:
			*val = (*pci_config_data_reg);
	}
	return PCIBIOS_SUCCESSFUL;
}

static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
                            int size, uint32_t val)
{
	*pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
	    ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
	switch (size) {
		case 1:
			*(volatile u8 *)(((int)pci_config_data_reg) +
			    (where & 3)) = val;
			break;
		case 2:
			*(volatile u16 *)(((int)pci_config_data_reg) +
			    (where & 2)) = (val);
			break;
		default:
			*pci_config_data_reg = (val);
	}

	return PCIBIOS_SUCCESSFUL;
}

struct pci_ops adm5120_pci_ops = {
	.read	= pci_config_read,
	.write	= pci_config_write,
};