--- a/gcc/config/avr32/lib1funcs.S
+++ b/gcc/config/avr32/lib1funcs.S
@@ -1852,7 +1852,11 @@ __avr32_f64_div_res_subnormal:/* Divide
         mov     r10, 0
         ldm     sp++, r0, r1, r2, r3, r4, r5, r6, r7,pc
         
-17:     /* Return INF. */
+17:     
+        /* Check if op1 is zero. */
+        or      r4, r10, r11
+        breq    __avr32_f64_div_op1_zero
+        /* Return INF. */
         mov     r11, lr /*Get correct sign*/
         andh    r11, 0x8000, COH
         orh     r11, 0x7ff0