--- a/gcc/config/avr32/lib1funcs.S
+++ b/gcc/config/avr32/lib1funcs.S
@@ -1389,25 +1389,30 @@ __avr32_f64_cmp_lt:
 #endif  
  
         /* compare magnitude of op1 and op2 */
+        st.w    --sp, lr
+        st.w    --sp, r7
         lsl     r11,1                   /* Remove sign bit of op1 */
         srcs    r12                     /* Sign op1 to lsb of r12*/
-	subfeq	r10, 0
-	breq	3f			/* op1 zero */
         lsl     r9,1                    /* Remove sign bit of op2 */
+        srcs    r7
         rol     r12                     /* Sign op2 to lsb of lr, sign bit op1 bit 1 of r12*/
 	
  
         /* Check for Nan */
-	pushm	lr
-	mov_imm	lr, 0xffe00000
+        mov_imm lr, 0xffe00000
         cp.w    r10,0
         cpc     r11,lr
         brhi    0f      /* We have NaN */
         cp.w    r8,0
         cpc     r9,lr
         brhi    0f      /* We have NaN */
-	popm	lr
- 
+
+        cp.w    r11, 0
+        subfeq  r10, 0
+        breq    3f			/* op1 zero */
+        ld.w    r7, sp++
+        ld.w    lr, sp++
+
         cp.w    r12,3                   /* both operands negative ?*/    
         breq    1f
  
@@ -1453,18 +1458,22 @@ __avr32_f64_cmp_lt:
 #endif
 
 0:      
+        ld.w    r7, sp++
         popm    pc, r12=0
 #endif
  
 3:
-        lsl     r9,1                   /* Remove sign bit of op1 */
+        cp.w    r7, 1          /* Check sign bit from r9 */
 #ifdef L_avr32_f64_cmp_ge
-        srcs    r12		       /* If op2 is negative then op1 >= op2. */	
+        sreq    r12		       /* If op2 is negative then op1 >= op2. */	
 #endif
 #ifdef L_avr32_f64_cmp_lt
-        srcc    r12		       /* If op2 is positve then op1 <= op2. */
+        srne    r12		       /* If op2 is positve then op1 <= op2. */
 #endif
-	subfeq	r8, 0		       
+        cp.w    r9, 0
+        subfeq  r8, 0
+        ld.w    r7, sp++
+        ld.w    lr, sp++
 #ifdef L_avr32_f64_cmp_ge
 	reteq	1		       /* Both operands are zero. Return true. */
 #endif