--- /dev/null
+++ b/arch/mips/include/asm/mach-lantiq/pci.h
@@ -0,0 +1,14 @@
+/*
+ *  lantiq SoCs specific PCI definitions
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_LANTIQ_PCI_H
+#define __ASM_MACH_LANTIQ_PCI_H
+
+extern int (*ifxmips_pci_plat_dev_init)(struct pci_dev *dev);
+
+#endif
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -68,6 +68,8 @@
 
 u32 lq_pci_mapped_cfg;
 
+int (*lqpci_plat_dev_init)(struct pci_dev *dev) = NULL;
+
 /* Since the PCI REQ pins can be reused for other functionality, make it possible
    to exclude those from interpretation by the PCI controller */
 static int lq_pci_req_mask = 0xf;
@@ -126,6 +128,10 @@
 			printk ("WARNING: invalid interrupt pin %d\n", pin);
 			return 1;
 	}
+
+	if (lqpci_plat_dev_init)
+		return lqpci_plat_dev_init(dev);
+
 	return 0;
 }