From c87a0c58116b2b2d8ccee9bb64df652b563307c4 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Thu, 8 Mar 2012 11:19:11 +0100 Subject: [PATCH 23/70] MIPS: lantiq: convert falcon to clkdev api Unify sysctrl/clock code and add clkdev hooks to sysctrl.c Signed-off-by: John Crispin --- .../include/asm/mach-lantiq/falcon/lantiq_soc.h | 8 +- arch/mips/lantiq/falcon/Makefile | 2 +- arch/mips/lantiq/falcon/sysctrl.c | 129 ++++++++++++-------- 3 files changed, 80 insertions(+), 59 deletions(-) --- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h +++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h @@ -95,6 +95,7 @@ /* Activation Status Register */ #define ACTS_ASC1_ACT 0x00000800 +#define ACTS_I2C_ACT 0x00004000 #define ACTS_P0 0x00010000 #define ACTS_P1 0x00010000 #define ACTS_P2 0x00020000 @@ -106,13 +107,6 @@ #define ACTS_PADCTRL3 0x00200000 #define ACTS_PADCTRL4 0x00400000 -extern void ltq_sysctl_activate(int module, unsigned int mask); -extern void ltq_sysctl_deactivate(int module, unsigned int mask); -extern void ltq_sysctl_clken(int module, unsigned int mask); -extern void ltq_sysctl_clkdis(int module, unsigned int mask); -extern void ltq_sysctl_reboot(int module, unsigned int mask); -extern int ltq_gpe_is_activated(unsigned int mask); - /* global register ranges */ extern __iomem void *ltq_ebu_membase; extern __iomem void *ltq_sys1_membase; --- a/arch/mips/lantiq/falcon/Makefile +++ b/arch/mips/lantiq/falcon/Makefile @@ -1,2 +1,2 @@ -obj-y := clk.o prom.o reset.o sysctrl.o devices.o gpio.o +obj-y := prom.o reset.o sysctrl.o devices.o gpio.o obj-$(CONFIG_LANTIQ_MACH_EASY98000) += mach-easy98000.o --- a/arch/mips/lantiq/falcon/sysctrl.c +++ b/arch/mips/lantiq/falcon/sysctrl.c @@ -9,11 +9,13 @@ #include #include +#include #include #include #include "devices.h" +#include "../clk.h" /* infrastructure control register */ #define SYS1_INFRAC 0x00bc @@ -38,6 +40,10 @@ #define LTQ_SYSCTL_DEACT 0x0028 /* reboot Register */ #define LTQ_SYSCTL_RBT 0x002c +/* CPU0 Clock Control Register */ +#define LTQ_SYS1_CPU0CC 0x0040 +/* clock divider bit */ +#define LTQ_CPU0CC_CPUDIV 0x0001 static struct resource ltq_sysctl_res[] = { MEM_RES("sys1", LTQ_SYS1_BASE_ADDR, LTQ_SYS1_SIZE), @@ -64,79 +70,67 @@ void __iomem *ltq_ebu_membase; #define ltq_status_r32(x) ltq_r32(ltq_status_membase + (x)) static inline void -ltq_sysctl_wait(int module, unsigned int mask, +ltq_sysctl_wait(struct clk *clk, unsigned int test, unsigned int reg) { int err = 1000000; - do {} while (--err && ((ltq_reg_r32(module, reg) - & mask) != test)); + do {} while (--err && ((ltq_reg_r32(clk->module, reg) + & clk->bits) != test)); if (!err) - pr_err("module de/activation failed %d %08X %08X\n", - module, mask, test); + pr_err("module de/activation failed %d %08X %08X %08X\n", + clk->module, clk->bits, test, + ltq_reg_r32(clk->module, reg) & clk->bits); } -void -ltq_sysctl_activate(int module, unsigned int mask) -{ - if (module > SYSCTL_SYSGPE) - return; - - ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN); - ltq_reg_w32(module, mask, LTQ_SYSCTL_ACT); - ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS); +static int +ltq_sysctl_activate(struct clk *clk) +{ + ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKEN); + ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_ACT); + ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_ACTS); + return 0; } -EXPORT_SYMBOL(ltq_sysctl_activate); -void -ltq_sysctl_deactivate(int module, unsigned int mask) +static void +ltq_sysctl_deactivate(struct clk *clk) { - if (module > SYSCTL_SYSGPE) - return; - - ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR); - ltq_reg_w32(module, mask, LTQ_SYSCTL_DEACT); - ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_ACTS); + ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKCLR); + ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_DEACT); + ltq_sysctl_wait(clk, 0, LTQ_SYSCTL_ACTS); } -EXPORT_SYMBOL(ltq_sysctl_deactivate); -void -ltq_sysctl_clken(int module, unsigned int mask) +static int +ltq_sysctl_clken(struct clk *clk) { - if (module > SYSCTL_SYSGPE) - return; - - ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN); - ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_CLKS); + ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKEN); + ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_CLKS); + return 0; } -EXPORT_SYMBOL(ltq_sysctl_clken); -void -ltq_sysctl_clkdis(int module, unsigned int mask) +static void +ltq_sysctl_clkdis(struct clk *clk) { - if (module > SYSCTL_SYSGPE) - return; - - ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR); - ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_CLKS); + ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKCLR); + ltq_sysctl_wait(clk, 0, LTQ_SYSCTL_CLKS); } -EXPORT_SYMBOL(ltq_sysctl_clkdis); -void -ltq_sysctl_reboot(int module, unsigned int mask) +static void +ltq_sysctl_reboot(struct clk *clk) { unsigned int act; + unsigned int bits; - if (module > SYSCTL_SYSGPE) - return; - - act = ltq_reg_r32(module, LTQ_SYSCTL_ACT); - if ((~act & mask) != 0) - ltq_sysctl_activate(module, ~act & mask); - ltq_reg_w32(module, act & mask, LTQ_SYSCTL_RBT); - ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS); + act = ltq_reg_r32(clk->module, LTQ_SYSCTL_ACT); + bits = ~act & clk->bits; + if (bits != 0) { + ltq_reg_w32(clk->module, bits, LTQ_SYSCTL_CLKEN); + ltq_reg_w32(clk->module, bits, LTQ_SYSCTL_ACT); + ltq_sysctl_wait(clk, bits, LTQ_SYSCTL_ACTS); + } + ltq_reg_w32(clk->module, act & clk->bits, LTQ_SYSCTL_RBT); + ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_ACTS); } -EXPORT_SYMBOL(ltq_sysctl_reboot); /* enable the ONU core */ static void @@ -167,6 +161,24 @@ ltq_gpe_enable(void) udelay(1); } +static inline void +clkdev_add_sys(const char *dev, unsigned int module, + unsigned int bits) +{ + struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL); + + clk->cl.dev_id = dev; + clk->cl.con_id = NULL; + clk->cl.clk = clk; + clk->module = module; + clk->activate = ltq_sysctl_activate; + clk->deactivate = ltq_sysctl_deactivate; + clk->enable = ltq_sysctl_clken; + clk->disable = ltq_sysctl_clkdis; + clk->reboot = ltq_sysctl_reboot; + clkdev_add(&clk->cl); +} + void __init ltq_soc_init(void) { @@ -180,4 +192,19 @@ ltq_soc_init(void) ltq_ebu_membase = ltq_remap_resource(<q_ebu_res); ltq_gpe_enable(); + + /* get our 3 static rates for cpu, fpi and io clocks */ + if (ltq_sys1_r32(LTQ_SYS1_CPU0CC) & LTQ_CPU0CC_CPUDIV) + clkdev_add_static(CLOCK_200M, CLOCK_100M, CLOCK_200M); + else + clkdev_add_static(CLOCK_400M, CLOCK_100M, CLOCK_200M); + + /* add our clock domains */ + clkdev_add_sys("falcon_gpio.0", SYSCTL_SYSETH, ACTS_PADCTRL0 | ACTS_P0); + clkdev_add_sys("falcon_gpio.1", SYSCTL_SYS1, ACTS_PADCTRL1 | ACTS_P1); + clkdev_add_sys("falcon_gpio.2", SYSCTL_SYSETH, ACTS_PADCTRL2 | ACTS_P2); + clkdev_add_sys("falcon_gpio.3", SYSCTL_SYS1, ACTS_PADCTRL3 | ACTS_P3); + clkdev_add_sys("falcon_gpio.4", SYSCTL_SYS1, ACTS_PADCTRL4 | ACTS_P4); + clkdev_add_sys("ltq_asc.1", SYSCTL_SYS1, ACTS_ASC1_ACT); + clkdev_add_sys("falcon_i2c", SYSCTL_SYS1, ACTS_I2C_ACT); }