Index: linux-2.6.25.1/arch/arm/mach-ixp4xx/Kconfig =================================================================== --- linux-2.6.25.1.orig/arch/arm/mach-ixp4xx/Kconfig +++ linux-2.6.25.1/arch/arm/mach-ixp4xx/Kconfig @@ -25,6 +25,14 @@ config MACH_AVILA Avila Network Platform. For more information on this platform, see . +config MACH_CAMBRIA + bool "Cambria" + select PCI + help + Say 'Y' here if you want your kernel to support the Gateworks + Cambria series. For more information on this platform, + see . + config MACH_LOFT bool "Loft" depends on MACH_AVILA @@ -200,7 +208,7 @@ config CPU_IXP46X config CPU_IXP43X bool - depends on MACH_KIXRP435 + depends on MACH_KIXRP435 || MACH_CAMBRIA default y config MACH_GTWX5715 Index: linux-2.6.25.1/arch/arm/mach-ixp4xx/Makefile =================================================================== --- linux-2.6.25.1.orig/arch/arm/mach-ixp4xx/Makefile +++ linux-2.6.25.1/arch/arm/mach-ixp4xx/Makefile @@ -7,6 +7,7 @@ obj-pci-n := obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o +obj-pci-$(CONFIG_MACH_CAMBRIA) += cambria-pci.o obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o @@ -28,6 +29,7 @@ obj-y += common.o obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o obj-$(CONFIG_MACH_AVILA) += avila-setup.o +obj-$(CONFIG_MACH_CAMBRIA) += cambria-setup.o obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o Index: linux-2.6.25.1/arch/arm/mach-ixp4xx/cambria-pci.c =================================================================== --- /dev/null +++ linux-2.6.25.1/arch/arm/mach-ixp4xx/cambria-pci.c @@ -0,0 +1,74 @@ +/* + * arch/arch/mach-ixp4xx/cambria-pci.c + * + * PCI setup routines for Gateworks Cambria series + * + * Copyright (C) 2008 Imre Kaloz + * + * based on coyote-pci.c: + * Copyright (C) 2002 Jungo Software Technologies. + * Copyright (C) 2003 MontaVista Softwrae, Inc. + * + * Maintainer: Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include +#include + +#include +#include +#include + +#include + +extern void ixp4xx_pci_preinit(void); +extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); +extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); + +void __init cambria_pci_preinit(void) +{ + set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW); + set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW); + set_irq_type(IRQ_IXP4XX_GPIO9, IRQT_LOW); + set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW); + + ixp4xx_pci_preinit(); +} + +static int __init cambria_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + if (slot == 1) + return IRQ_IXP4XX_GPIO11; + else if (slot == 2) + return IRQ_IXP4XX_GPIO10; + else if (slot == 3) + return IRQ_IXP4XX_GPIO9; + else if (slot == 4) + return IRQ_IXP4XX_GPIO8; + else return -1; +} + +struct hw_pci cambria_pci __initdata = { + .nr_controllers = 1, + .preinit = cambria_pci_preinit, + .swizzle = pci_std_swizzle, + .setup = ixp4xx_setup, + .scan = ixp4xx_scan_bus, + .map_irq = cambria_map_irq, +}; + +int __init cambria_pci_init(void) +{ + if (machine_is_cambria()) + pci_common_init(&cambria_pci); + return 0; +} + +subsys_initcall(cambria_pci_init); Index: linux-2.6.25.1/arch/arm/mach-ixp4xx/cambria-setup.c =================================================================== --- /dev/null +++ linux-2.6.25.1/arch/arm/mach-ixp4xx/cambria-setup.c @@ -0,0 +1,250 @@ +/* + * arch/arm/mach-ixp4xx/cambria-setup.c + * + * Board setup for the Gateworks Cambria series + * + * Copyright (C) 2008 Imre Kaloz + * + * based on coyote-setup.c: + * Copyright (C) 2003-2005 MontaVista Software, Inc. + * + * Author: Imre Kaloz + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_SENSORS_EEPROM +# include +# include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct flash_platform_data cambria_flash_data = { + .map_name = "cfi_probe", + .width = 2, +}; + +static struct resource cambria_flash_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device cambria_flash = { + .name = "IXP4XX-Flash", + .id = 0, + .dev = { + .platform_data = &cambria_flash_data, + }, + .num_resources = 1, + .resource = &cambria_flash_resource, +}; + +static struct i2c_gpio_platform_data cambria_i2c_gpio_data = { + .sda_pin = 7, + .scl_pin = 6, +}; + +static struct platform_device cambria_i2c_gpio = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &cambria_i2c_gpio_data, + }, +}; + +static struct resource cambria_uart_resource = { + .start = IXP4XX_UART1_BASE_PHYS, + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, + .flags = IORESOURCE_MEM, +}; + +static struct plat_serial8250_port cambria_uart_data[] = { + { + .mapbase = IXP4XX_UART1_BASE_PHYS, + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, + .irq = IRQ_IXP4XX_UART1, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP4XX_UART_XTAL, + }, + { }, +}; + +static struct platform_device cambria_uart = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = cambria_uart_data, + }, + .num_resources = 1, + .resource = &cambria_uart_resource, +}; + +static struct resource cambria_pata_resources[] = { + { + .flags = IORESOURCE_MEM + }, + { + .flags = IORESOURCE_MEM, + }, + { + .name = "intrq", + .start = IRQ_IXP4XX_GPIO12, + .end = IRQ_IXP4XX_GPIO12, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct ixp4xx_pata_data cambria_pata_data = { + .cs0_bits = 0xbfff3c03, + .cs1_bits = 0xbfff3c03, +}; + +static struct platform_device cambria_pata = { + .name = "pata_ixp4xx_cf", + .id = 0, + .dev.platform_data = &cambria_pata_data, + .num_resources = ARRAY_SIZE(cambria_pata_resources), + .resource = cambria_pata_resources, +}; + +static struct eth_plat_info cambria_plat_eth[] = { + { + .phy = 2, + .rxq = 4, + .txreadyq = 21, + }, { + .phy = 1, + .rxq = 2, + .txreadyq = 19, + } +}; + +static struct platform_device cambria_eth[] = { + { + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEC, + .dev.platform_data = cambria_plat_eth, + }, { + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEA, + .dev.platform_data = cambria_plat_eth + 1, + } +}; + +#ifdef CONFIG_LEDS_IXP4XX +static struct platform_device cambria_leds_pld = { + .name = "IXP4XX-PLD-LED", + .id = -1, + .num_resources = 0, +}; + +static struct platform_device cambria_leds_mem = { + .name = "IXP4XX-MEM-LED", + .id = -1, + .num_resources = 0, +}; +#endif + +static struct platform_device *cambria_devices[] __initdata = { + &cambria_i2c_gpio, + &cambria_flash, + &cambria_uart, +#ifdef CONFIG_LEDS_IXP4XX + &cambria_leds_pld, + &cambria_leds_mem, +#endif + &cambria_eth[0], + &cambria_eth[1], +}; + +#ifdef CONFIG_SENSORS_EEPROM +static int cambria_eeprom_do(struct notifier_block *self, unsigned long event, void *t) +{ + struct eeprom_data *data = t; + struct sockaddr address; + struct net_device * netdev; + + char macs[12]; + + /* The MACs are the first 12 bytes in the eeprom at address 0x51 */ + if (event == EEPROM_REGISTER && data->client.addr == 0x51) { + data->attr->read(&data->client.dev.kobj, data->attr, macs, 0, 12); + /* eth0 */ + memcpy(address.sa_data, macs, ETH_ALEN); + memcpy(&cambria_plat_eth[0].hwaddr, macs, ETH_ALEN); + if ( (netdev = dev_get_by_name(&init_net, "eth0")) ) + netdev->set_mac_address(netdev, &address); + + /* eth1 */ + memcpy(address.sa_data, macs + ETH_ALEN, ETH_ALEN); + memcpy(&cambria_plat_eth[1].hwaddr, macs + ETH_ALEN, ETH_ALEN); + if ( (netdev = dev_get_by_name(&init_net, "eth1")) ) + netdev->set_mac_address(netdev, &address); + } + + return NOTIFY_DONE; +} + +static struct notifier_block cambria_eeprom_notifier = { + .notifier_call = cambria_eeprom_do +}; +#endif + +static void __init cambria_init(void) +{ + ixp4xx_sys_init(); + +#ifdef CONFIG_SENSORS_EEPROM + register_eeprom_notifier(&cambria_eeprom_notifier); +#endif + + cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); + cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; + + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; + + platform_add_devices(cambria_devices, ARRAY_SIZE(cambria_devices)); + + cambria_pata_resources[0].start = 0x53e00000; + cambria_pata_resources[0].end = 0x53e3ffff; + + cambria_pata_resources[1].start = 0x53e40000; + cambria_pata_resources[1].end = 0x53e7ffff; + + cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3; + cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3; + + platform_device_register(&cambria_pata); +} + +#ifdef CONFIG_MACH_CAMBRIA +MACHINE_START(CAMBRIA, "Gateworks Cambria series") + /* Maintainer: Imre Kaloz */ + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, + .map_io = ixp4xx_map_io, + .init_irq = ixp4xx_init_irq, + .timer = &ixp4xx_timer, + .boot_params = 0x0100, + .init_machine = cambria_init, +MACHINE_END +#endif Index: linux-2.6.25.1/include/asm-arm/arch-ixp4xx/hardware.h =================================================================== --- linux-2.6.25.1.orig/include/asm-arm/arch-ixp4xx/hardware.h +++ linux-2.6.25.1/include/asm-arm/arch-ixp4xx/hardware.h @@ -18,7 +18,7 @@ #define __ASM_ARCH_HARDWARE_H__ #define PCIBIOS_MIN_IO 0x00001000 -#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x40000000 : 0x48000000) +#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x48000000 : 0x48000000) /* * We override the standard dma-mask routines for bouncing.