--- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -39,7 +39,7 @@ #include #define AMD_BOOTLOC_BUG -#define FORCE_WORD_WRITE 0 +#define FORCE_WORD_WRITE 1 #define MAX_WORD_RETRIES 3 @@ -190,6 +190,7 @@ static void fixup_amd_bootblock(struct m } #endif +#if !FORCE_WORD_WRITE static void fixup_use_write_buffers(struct mtd_info *mtd, void *param) { struct map_info *map = mtd->priv; @@ -199,6 +200,7 @@ static void fixup_use_write_buffers(stru mtd->write = cfi_amdstd_write_buffers; } } +#endif /* Atmel chips don't use the same PRI format as AMD chips */ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) @@ -1152,7 +1154,7 @@ static int __xipram do_write_oneword(str break; } - if (chip_ready(map, adr)) + if (chip_good(map, adr, datum)) break; /* Latency issues. Drop the lock, wait a while and retry */ @@ -1436,6 +1438,7 @@ static int __xipram do_write_buffer(stru } +#if !FORCE_WORD_WRITE static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf) { @@ -1514,7 +1517,7 @@ static int cfi_amdstd_write_buffers(stru return 0; } - +#endif /* * Handle devices with one erase region, that only implement @@ -1579,7 +1582,7 @@ static int __xipram do_erase_chip(struct chip->erase_suspended = 0; } - if (chip_ready(map, adr)) + if (chip_good(map, adr, map_word_ff(map))) break; if (time_after(jiffies, timeo)) { @@ -1667,7 +1670,7 @@ static int __xipram do_erase_oneblock(st chip->erase_suspended = 0; } - if (chip_ready(map, adr)) { + if (chip_good(map, adr, map_word_ff(map))) { xip_enable(map, chip, adr); break; }