From 99bc9d1f5770067b2936e6b2f03ca93c3b5710d6 Mon Sep 17 00:00:00 2001 From: florian Date: Thu, 17 Jan 2013 22:29:22 +0000 Subject: mvebu: enable PCIe on Marvell Armada 370 Reference Design Signed-off-by: Florian Fainelli git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35213 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../044-arm_mvebu_add_pcie_dt_a370_rd.patch | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch (limited to 'target') diff --git a/target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch b/target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch new file mode 100644 index 000000000..f3a02d787 --- /dev/null +++ b/target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch @@ -0,0 +1,23 @@ +--- a/arch/arm/boot/dts/armada-370-rd.dts ++++ b/arch/arm/boot/dts/armada-370-rd.dts +@@ -71,5 +71,20 @@ + usb@d0051000 { + status = "okay"; + }; ++ ++ pcie-controller { ++ status = "okay"; ++ /* ++ * The two PCIe units are accessible through ++ * both standard PCIe slots and mini-PCIe ++ * slots on the board. ++ */ ++ pcie0@0xd0040000 { ++ status = "okay"; ++ }; ++ pcie1@0xd0080000 { ++ status = "okay"; ++ }; ++ }; + }; + }; -- cgit v1.2.3