From 40cda6a3fe597e08df4f9184731d992693f8b008 Mon Sep 17 00:00:00 2001 From: juhosg Date: Fri, 26 Dec 2008 21:48:50 +0000 Subject: [ar71xx] add WMAC definitions git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13746 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h | 3 +++ target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h | 3 +++ 2 files changed, 6 insertions(+) (limited to 'target/linux') diff --git a/target/linux/ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h index a322929ef..9b423abd8 100644 --- a/target/linux/ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h @@ -56,6 +56,8 @@ #define AR71XX_DMA_SIZE 0x10000 #define AR71XX_STEREO_BASE (AR71XX_APB_BASE + 0x000B0000) #define AR71XX_STEREO_SIZE 0x10000 +#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) +#define AR91XX_WMAC_SIZE 0x30000 #define AR71XX_CPU_IRQ_BASE 0 #define AR71XX_MISC_IRQ_BASE 8 @@ -343,6 +345,7 @@ extern void ar71xx_ddr_flush(u32 reg); #define RESET_MODULE_EXTERNAL BIT(28) #define RESET_MODULE_FULL_CHIP BIT(24) +#define RESET_MODULE_AMBA2WMAC BIT(22) #define RESET_MODULE_CPU_NMI BIT(21) #define RESET_MODULE_CPU_COLD BIT(20) #define RESET_MODULE_DMA BIT(19) diff --git a/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h index a322929ef..9b423abd8 100644 --- a/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h @@ -56,6 +56,8 @@ #define AR71XX_DMA_SIZE 0x10000 #define AR71XX_STEREO_BASE (AR71XX_APB_BASE + 0x000B0000) #define AR71XX_STEREO_SIZE 0x10000 +#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) +#define AR91XX_WMAC_SIZE 0x30000 #define AR71XX_CPU_IRQ_BASE 0 #define AR71XX_MISC_IRQ_BASE 8 @@ -343,6 +345,7 @@ extern void ar71xx_ddr_flush(u32 reg); #define RESET_MODULE_EXTERNAL BIT(28) #define RESET_MODULE_FULL_CHIP BIT(24) +#define RESET_MODULE_AMBA2WMAC BIT(22) #define RESET_MODULE_CPU_NMI BIT(21) #define RESET_MODULE_CPU_COLD BIT(20) #define RESET_MODULE_DMA BIT(19) -- cgit v1.2.3