From e6d87036412b952cb083eff2dc716aee97a771f2 Mon Sep 17 00:00:00 2001 From: Roman Yeryomin Date: Fri, 17 May 2013 20:40:24 +0300 Subject: Move to rsdk 3.2.4. Compiles cleanly. Signed-off-by: Roman Yeryomin --- .../net/wireless/rtl8192cd/OUTSRC/HalPhyRf.h | 70 ++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 target/linux/realtek/files/drivers/net/wireless/rtl8192cd/OUTSRC/HalPhyRf.h (limited to 'target/linux/realtek/files/drivers/net/wireless/rtl8192cd/OUTSRC/HalPhyRf.h') diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/OUTSRC/HalPhyRf.h b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/OUTSRC/HalPhyRf.h new file mode 100644 index 000000000..6596c05c3 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/OUTSRC/HalPhyRf.h @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + + #ifndef __HAL_PHY_RF_H__ + #define __HAL_PHY_RF_H__ + + #if(DM_ODM_SUPPORT_TYPE & ODM_MP) + #define MAX_TOLERANCE 5 + #define IQK_DELAY_TIME 1 //ms + + // +// BB/MAC/RF other monitor API +// + +void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, + IN BOOLEAN bEnableMonitorMode ); + +// +// IQ calibrate +// +void +PHY_IQCalibrate_8192C( IN PADAPTER pAdapter, + IN BOOLEAN bReCovery); + +// +// LC calibrate +// +void +PHY_LCCalibrate_8192C( IN PADAPTER pAdapter); + +// +// AP calibrate +// +void +PHY_APCalibrate_8192C( IN PADAPTER pAdapter, + IN s1Byte delta); +#endif + +#define ODM_TARGET_CHNL_NUM_2G_5G 59 + + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) || defined(CALIBRATE_BY_ODM) +VOID +ODM_ResetIQKResult( + IN PDM_ODM_T pDM_Odm +); +#endif + +u1Byte +ODM_GetRightChnlPlaceforIQK( + IN u1Byte chnl +); +#endif // #ifndef __HAL_PHY_RF_H__ -- cgit v1.2.3