From 5deb3317cb51ac52de922bb55f8492624018906d Mon Sep 17 00:00:00 2001 From: Roman Yeryomin Date: Thu, 13 Sep 2012 00:40:35 +0300 Subject: Add realtek target files Signed-off-by: Roman Yeryomin --- target/linux/realtek/files/arch/rlx/lib/ashldi3.c | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 target/linux/realtek/files/arch/rlx/lib/ashldi3.c (limited to 'target/linux/realtek/files/arch/rlx/lib/ashldi3.c') diff --git a/target/linux/realtek/files/arch/rlx/lib/ashldi3.c b/target/linux/realtek/files/arch/rlx/lib/ashldi3.c new file mode 100644 index 000000000..beb80f316 --- /dev/null +++ b/target/linux/realtek/files/arch/rlx/lib/ashldi3.c @@ -0,0 +1,29 @@ +#include + +#include "libgcc.h" + +long long __ashldi3(long long u, word_type b) +{ + DWunion uu, w; + word_type bm; + + if (b == 0) + return u; + + uu.ll = u; + bm = 32 - b; + + if (bm <= 0) { + w.s.low = 0; + w.s.high = (unsigned int) uu.s.low << -bm; + } else { + const unsigned int carries = (unsigned int) uu.s.low >> bm; + + w.s.low = (unsigned int) uu.s.low << b; + w.s.high = ((unsigned int) uu.s.high << b) | carries; + } + + return w.ll; +} + +EXPORT_SYMBOL(__ashldi3); -- cgit v1.2.3