From a27354c9021a8423ef8c7d2bffad49cbf639eec1 Mon Sep 17 00:00:00 2001 From: Roman Yeryomin Date: Thu, 13 Sep 2012 00:40:35 +0300 Subject: Add realtek target files Signed-off-by: Roman Yeryomin --- .../linux/realtek/files/arch/rlx/kernel/irq_vec.c | 123 +++++++++++++++++++++ 1 file changed, 123 insertions(+) create mode 100644 target/linux/realtek/files/arch/rlx/kernel/irq_vec.c (limited to 'target/linux/realtek/files/arch/rlx/kernel/irq_vec.c') diff --git a/target/linux/realtek/files/arch/rlx/kernel/irq_vec.c b/target/linux/realtek/files/arch/rlx/kernel/irq_vec.c new file mode 100644 index 000000000..0fcda8735 --- /dev/null +++ b/target/linux/realtek/files/arch/rlx/kernel/irq_vec.c @@ -0,0 +1,123 @@ +/* + * Realtek Semiconductor Corp. + * + * This file define the irq handler for RLX CPU interrupts. + * + * Tony Wu (tonywu@realtek.com.tw) + * Feb. 28, 2008 + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include "bspchip.h" + +__IRAM_GEN +static void unmask_rlx_vec_irq(unsigned int irq) +{ + set_lxc0_estatus(0x10000 << (irq - BSP_IRQ_LOPI_BASE)); + irq_enable_hazard(); +} + +__IRAM_GEN +static void mask_rlx_vec_irq(unsigned int irq) +{ + clear_lxc0_estatus(0x10000 << (irq - BSP_IRQ_LOPI_BASE)); + irq_disable_hazard(); +} + +static struct irq_chip rlx_vec_irq_controller = { + .typename = "RLX LOPI", + .ack = mask_rlx_vec_irq, + .mask = mask_rlx_vec_irq, + .mask_ack = mask_rlx_vec_irq, + .unmask = unmask_rlx_vec_irq, + .eoi = unmask_rlx_vec_irq, +}; + +//static struct irq_desc *rlx_vec_irq_desc; + +void __init rlx_vec_irq_init(int irq_base) +{ + int i; + extern char rlx_vec_dispatch; + + /* Mask interrupts. */ + clear_lxc0_estatus(EST0_IM); + clear_lxc0_ecause(ECAUSEF_IP); + + // rlx_vec_irq_desc = irq_desc + irq_base; + + for (i = irq_base; i < irq_base + BSP_IRQ_LOPI_NUM; i++) + set_irq_chip_and_handler(i, &rlx_vec_irq_controller, handle_percpu_irq); + + write_lxc0_intvec(&rlx_vec_dispatch); + + #if 1 + /* enable global interrupt mask */ + REG32(BSP_GIMR) = BSP_TC0_IE | BSP_UART0_IE ; + + #ifdef CONFIG_SERIAL_RTL8198_UART1 + REG32(BSP_GIMR) |= BSP_UART1_IE; + #endif + + #if defined(CONFIG_RTL8192CD) + #if (defined(CONFIG_RTL_8196C) || defined(CONFIG_RTL_8196CT) || defined(CONFIG_RTL_8196CS) || !defined(CONFIG_RTL_92D_DMDP)) + REG32(BSP_GIMR) |= (BSP_PCIE_IE); + #endif + #if defined(CONFIG_RTL_DUAL_PCIESLOT_BIWLAN_D) || (defined(CONFIG_RTL_8198)&&defined(CONFIG_RTL_92D_SUPPORT)) + REG32(BSP_GIMR) |= (BSP_PCIE2_IE); + #endif + #endif + + #if defined(CONFIG_USB) + REG32(BSP_GIMR) |= BSP_USB_H_IE; + #endif + + #if defined(CONFIG_RTL_819X) || defined(CONFIG_RTL_ICTEST_SWITCH) || defined(CONFIG_RTL_865X_ETH) + REG32(BSP_GIMR) |= (BSP_SW_IE); + #endif + + #if defined(CONFIG_RTL_NFBI_MDIO) + REG32(BSP_GIMR) |= BSP_NFBI_IE; + #endif + + #ifdef CONFIG_RTL_8198_NFBI_BOARD + setup_reboot_addr(0x80700000); + #endif + + #if defined(CONFIG_RTK_VOIP) + REG32(BSP_GIMR) |= (BSP_PCM_IE | BSP_I2S_IE); + REG32(BSP_GIMR) |= (BSP_GPIO_ABCD_IE | BSP_GPIO_EFGH_IE); + #endif + #endif + +} + +__IRAM_GEN +asmlinkage void rlx_do_lopi_IRQ(int irq_offset) +{ + unsigned int pending; + unsigned int cause; + unsigned int status; + + cause = read_lxc0_ecause(); + status = read_lxc0_estatus(); + pending = cause & status & EST0_IM; + + if (pending & (_ULCAST_(1) << (irq_offset + 16))) { + do_IRQ(BSP_IRQ_LOPI_BASE + irq_offset); + } else { + #if defined(CONFIG_RTK_VOIP) || defined(CONFIG_RTL_819X) + spurious_interrupt(SPURIOS_INT_LOPI); + #else + spurious_interrupt(); + #endif + } +} -- cgit v1.2.3