From 1bac05a581c234948c3a041b97e6ca011044b418 Mon Sep 17 00:00:00 2001 From: juhosg Date: Wed, 29 Aug 2012 10:37:40 +0000 Subject: ramips: Minor ramips_esw.c cleanup Stop handling VLAN setup in the kernel. Removes the obsolete RT305X_ESW_VLAN_CONFIG_BYPASS option I added for WL-351 and add some extra comments. Also removes the en_vlan per-port flag that isn't very useful really, it now is only controlled by the global enable_vlan flag. Signed-off-by: Tobias Diedrich git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33301 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c | 7 +++++++ target/linux/ramips/files/arch/mips/ralink/rt305x/mach-wl351.c | 10 ++++++++-- 2 files changed, 15 insertions(+), 2 deletions(-) (limited to 'target/linux/ramips/files/arch/mips/ralink') diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c index 2e884c39e..07e950ad9 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c @@ -156,8 +156,15 @@ static struct resource rt305x_esw_resources[] = { }; struct rt305x_esw_platform_data rt305x_esw_data = { + /* All ports are LAN ports. */ .vlan_config = RT305X_ESW_VLAN_CONFIG_NONE, .reg_initval_fct2 = 0x00d6500c, + /* + * ext phy base addr 31, enable port 5 polling, rx/tx clock skew 1, + * turbo mii off, rgmi 3.3v off + * port5: disabled + * port6: enabled, gige, full-duplex, rx/tx-flow-control + */ .reg_initval_fpa2 = 0x3f502b28, }; diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/mach-wl351.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/mach-wl351.c index 8551f2541..8c0caadb1 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/mach-wl351.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/mach-wl351.c @@ -97,9 +97,15 @@ static void __init wl351_init(void) ramips_register_gpio_buttons(-1, WL351_KEYS_POLL_INTERVAL, ARRAY_SIZE(wl351_gpio_buttons), wl351_gpio_buttons); - // external rtl8366rb - rt305x_esw_data.vlan_config = RT305X_ESW_VLAN_CONFIG_BYPASS; + /* External RTL8366RB. */ + rt305x_esw_data.vlan_config = RT305X_ESW_VLAN_CONFIG_NONE; rt305x_esw_data.reg_initval_fct2 = 0x0002500c; + /* + * ext phy base addr 31, rx/tx clock skew 0, + * turbo mii off, rgmi 3.3v off, port 5 polling off + * port5: enabled, gige, full-duplex, rx/tx-flow-control + * port6: enabled, gige, full-duplex, rx/tx-flow-control + */ rt305x_esw_data.reg_initval_fpa2 = 0x1f003fff; rt305x_register_ethernet(); platform_device_register(&wl351_switch); -- cgit v1.2.3