From 0dad89e259fbc5115631b0cfa54ea512eb411121 Mon Sep 17 00:00:00 2001 From: juhosg Date: Tue, 14 Feb 2012 17:32:42 +0000 Subject: ramips: rt3883: add PCI support git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30527 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../arch/mips/include/asm/mach-ralink/rt3883.h | 22 ++++++++++++++++++++++ .../mips/include/asm/mach-ralink/rt3883_regs.h | 8 ++++++++ 2 files changed, 30 insertions(+) (limited to 'target/linux/ramips/files/arch/mips/include/asm') diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h index 004acfb73..a7a4b074a 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h @@ -26,6 +26,9 @@ void rt3883_detect_sys_type(void); #define RT3883_INTC_IRQ_BASE (RT3883_CPU_IRQ_BASE + RT3883_CPU_IRQ_COUNT) #define RT3883_INTC_IRQ_COUNT 32 #define RT3883_GPIO_IRQ_BASE (RT3883_INTC_IRQ_BASE + RT3883_INTC_IRQ_COUNT) +#define RT3883_GPIO_IRQ_COUNT 96 +#define RT3883_PCI_IRQ_BASE (RT3883_GPIO_IRQ_BASE + RT3883_GPIO_IRQ_COUNT) +#define RT3883_PCI_IRQ_COUNT 3 #define RT3883_CPU_IRQ_INTC (RT3883_CPU_IRQ_BASE + 2) #define RT3883_CPU_IRQ_PCI (RT3883_CPU_IRQ_BASE + 4) @@ -48,6 +51,10 @@ void rt3883_detect_sys_type(void); #define RT3883_INTC_IRQ_UHST (RT3883_INTC_IRQ_BASE + 18) #define RT3883_INTC_IRQ_UDEV (RT3883_INTC_IRQ_BASE + 19) +#define RT3883_PCI_IRQ_PCI0 (RT3883_PCI_IRQ_BASE + 0) +#define RT3883_PCI_IRQ_PCI1 (RT3883_PCI_IRQ_BASE + 1) +#define RT3883_PCI_IRQ_PCIE (RT3883_PCI_IRQ_BASE + 2) + extern void __iomem *rt3883_sysc_base; extern void __iomem *rt3883_memc_base; @@ -130,4 +137,19 @@ static inline u32 rt3883_memc_rr(unsigned reg) void rt3883_gpio_init(u32 mode); +#define RT3883_PCI_MODE_PCI 0x01 +#define RT3883_PCI_MODE_PCIE 0x02 +#define RT3883_PCI_MODE_BOTH (RT3883_PCI_MODE_PCI | RT3883_PCI_MODE_PCIE) + +struct pci_dev; + +#ifdef CONFIG_PCI +void rt3883_pci_init(unsigned mode); +void rt3883_pci_set_plat_dev_init(int (*f)(struct pci_dev *)); +#else +static inline void rt3883_pci_init(unsigned mode) {} +static inline void rt3883_pci_set_plat_dev_init(int (*f)(struct pci_dev *)) {} +} +#endif /* CONFIG_PCI */ + #endif /* _RT3883_H_ */ diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883_regs.h index 7149e6faf..b36cabe85 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883_regs.h @@ -80,6 +80,9 @@ #define RT3883_SYSC_REG_RSTSTAT 0x38 /* Reset Status*/ #define RT3883_SYSC_REG_USB_PS 0x5c /* USB Power saving control */ #define RT3883_SYSC_REG_GPIO_MODE 0x60 /* GPIO Purpose Select */ +#define RT3883_SYSC_REG_PCIE_CLK_GEN0 0x7c +#define RT3883_SYSC_REG_PCIE_CLK_GEN1 0x80 +#define RT3883_SYSC_REG_PCIE_CLK_GEN2 0x84 #define RT3883_SYSC_REG_PMU 0x88 #define RT3883_SYSC_REG_PMU1 0x8c @@ -96,9 +99,14 @@ #define RT3883_SYSCFG0_CPUCLK_500 0x3 #define RT3883_SYSCFG1_USB0_HOST_MODE BIT(10) +#define RT3883_SYSCFG1_PCIE_RC_MODE BIT(8) +#define RT3883_SYSCFG1_PCI_HOST_MODE BIT(7) +#define RT3883_SYSCFG1_PCI_66M_MODE BIT(6) #define RT3883_SYSCFG1_GPIO2_AS_WDT_OUT BIT(2) +#define RT3883_CLKCFG1_PCIE_CLK_EN BIT(21) #define RT3883_CLKCFG1_UPHY1_CLK_EN BIT(20) +#define RT3883_CLKCFG1_PCI_CLK_EN BIT(19) #define RT3883_CLKCFG1_UPHY0_CLK_EN BIT(18) #define RT3883_GPIO_MODE_I2C BIT(0) -- cgit v1.2.3