From 8fb9ab479d4b4df9d66ea4f2f92fa7cf7ff43db5 Mon Sep 17 00:00:00 2001 From: blogic Date: Sun, 4 Oct 2009 19:53:17 +0000 Subject: adds pci support for rt288x git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17855 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../arch/mips/include/asm/mach-ralink/rt288x_pci.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h (limited to 'target/linux/ramips/files/arch/mips/include/asm/mach-ralink') diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h new file mode 100644 index 000000000..f73d7ac15 --- /dev/null +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h @@ -0,0 +1,19 @@ + +#ifdef CONFIG_PCI + +#define RT2880_PCI_SLOT1_BASE 0x20000000 +#define RALINK_PCI_BASE 0xA0440000 +#define RT2880_PCI_PCICFG_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0000)) +#define RT2880_PCI_ARBCTL ((unsigned long*)(RALINK_PCI_BASE + 0x0080)) +#define RT2880_PCI_BAR0SETUP_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0010)) +#define RT2880_PCI_CONFIG_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0020)) +#define RT2880_PCI_CONFIG_DATA ((unsigned long*)(RALINK_PCI_BASE + 0x0024)) +#define RT2880_PCI_MEMBASE ((unsigned long*)(RALINK_PCI_BASE + 0x0028)) +#define RT2880_PCI_IOBASE ((unsigned long*)(RALINK_PCI_BASE + 0x002C)) +#define RT2880_PCI_IMBASEBAR0_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0018)) +#define RT2880_PCI_ID ((unsigned long*)(RALINK_PCI_BASE + 0x0030)) +#define RT2880_PCI_CLASS ((unsigned long*)(RALINK_PCI_BASE + 0x0034)) +#define RT2880_PCI_SUBID ((unsigned long*)(RALINK_PCI_BASE + 0x0038)) +#define RT2880_PCI_PCIMSK_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x000C)) + +#endif -- cgit v1.2.3