From 518960de5fe311f05e1aeb030601e314af4f3f0c Mon Sep 17 00:00:00 2001 From: florian Date: Tue, 8 Jan 2013 22:20:16 +0000 Subject: mvebu: add inital support for Marvell Armada XP/370 SoCs This brings in the initial support for the Marvell Armada XP/370 SoCs. Successfully tested on RD-A370-A1 and DB-MV784MP-GP boards the following interfaces: - Ethernet - SDIO - GPIOs - SATA Signed-off-by: Florian Fainelli git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35058 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- ...-arm_cache_l2x0_aurora_use_writel_relaxed.patch | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 target/linux/mvebu/patches-3.8/017-arm_cache_l2x0_aurora_use_writel_relaxed.patch (limited to 'target/linux/mvebu/patches-3.8/017-arm_cache_l2x0_aurora_use_writel_relaxed.patch') diff --git a/target/linux/mvebu/patches-3.8/017-arm_cache_l2x0_aurora_use_writel_relaxed.patch b/target/linux/mvebu/patches-3.8/017-arm_cache_l2x0_aurora_use_writel_relaxed.patch new file mode 100644 index 000000000..5f5ba11d7 --- /dev/null +++ b/target/linux/mvebu/patches-3.8/017-arm_cache_l2x0_aurora_use_writel_relaxed.patch @@ -0,0 +1,45 @@ +From 6c8928f877a1572f16cfc8a0c055d7e16320c741 Mon Sep 17 00:00:00 2001 +From: Gregory CLEMENT +Date: Thu, 13 Dec 2012 18:33:06 +0100 +Subject: [PATCH] arm: cache-l2x0: aurora: Use writel_relaxed instead of + writel + +The use of writel instead of writel_relaxed lead to deadlock in some +situation (SMP on Armada 370 for instance). The use of writel_relaxed +as it was done in the rest of this driver fixes this bug. + +Signed-off-by: Gregory CLEMENT +--- + arch/arm/mm/cache-l2x0.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c +index 7ffe943..96a1ae4 100644 +--- a/arch/arm/mm/cache-l2x0.c ++++ b/arch/arm/mm/cache-l2x0.c +@@ -459,8 +459,8 @@ static void aurora_pa_range(unsigned long start, unsigned long end, + unsigned long flags; + + raw_spin_lock_irqsave(&l2x0_lock, flags); +- writel(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG); +- writel(end, l2x0_base + offset); ++ writel_relaxed(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG); ++ writel_relaxed(end, l2x0_base + offset); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); + + cache_sync(); +@@ -674,8 +674,9 @@ static void pl310_resume(void) + static void aurora_resume(void) + { + if (!(readl(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { +- writel(l2x0_saved_regs.aux_ctrl, l2x0_base + L2X0_AUX_CTRL); +- writel(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL); ++ writel_relaxed(l2x0_saved_regs.aux_ctrl, ++ l2x0_base + L2X0_AUX_CTRL); ++ writel_relaxed(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL); + } + } + +-- +1.7.10.4 + -- cgit v1.2.3