From e710e0ceb7a07e22cb19625c7fd706a30534fdf1 Mon Sep 17 00:00:00 2001 From: nbd Date: Tue, 16 Feb 2010 18:29:16 +0000 Subject: mpc83xx: add a workaround for erratum eTSEC27 in earlier mpc8313 chip revs git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19670 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../linux/mpc83xx/patches-2.6.32/110-etsec27_war.patch | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 target/linux/mpc83xx/patches-2.6.32/110-etsec27_war.patch (limited to 'target/linux/mpc83xx') diff --git a/target/linux/mpc83xx/patches-2.6.32/110-etsec27_war.patch b/target/linux/mpc83xx/patches-2.6.32/110-etsec27_war.patch new file mode 100644 index 000000000..111434b2c --- /dev/null +++ b/target/linux/mpc83xx/patches-2.6.32/110-etsec27_war.patch @@ -0,0 +1,18 @@ +--- a/drivers/net/gianfar.c ++++ b/drivers/net/gianfar.c +@@ -334,7 +334,14 @@ static int gfar_probe(struct of_device * + /* We need to delay at least 3 TX clocks */ + udelay(2); + +- tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); ++ /* ++ * Do not enable flow control on chips earlier than rev 1.1, ++ * because of the eTSEC27 erratum ++ */ ++ tempval = 0; ++ if (mfspr(SPRN_SVR) & 0xffff >= 0x0011) ++ tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); ++ + gfar_write(&priv->regs->maccfg1, tempval); + + /* Initialize MACCFG2. */ -- cgit v1.2.3