From 7d9a07b8551f0a3ec2e5a24c31ea1a60ecac2cad Mon Sep 17 00:00:00 2001 From: juhosg Date: Wed, 26 Dec 2012 10:40:54 +0000 Subject: mpc83xx: add support for 3.7 Signed-off-by: Gabor Juhos git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34892 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../linux/mpc83xx/patches-3.7/111-etsec27_war.patch | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch (limited to 'target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch') diff --git a/target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch b/target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch new file mode 100644 index 000000000..0fbae2b84 --- /dev/null +++ b/target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch @@ -0,0 +1,20 @@ +--- a/drivers/net/ethernet/freescale/gianfar.c ++++ b/drivers/net/ethernet/freescale/gianfar.c +@@ -1009,7 +1009,16 @@ static int gfar_probe(struct platform_de + /* We need to delay at least 3 TX clocks */ + udelay(2); + +- tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); ++ if ((mfspr(SPRN_SVR) & 0xffff) >= 0x0011) { ++ tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); ++ } else { ++ /* ++ * Do not enable flow control on chips earlier than rev 1.1, ++ * because of the eTSEC27 erratum ++ */ ++ tempval = 0; ++ } ++ + gfar_write(®s->maccfg1, tempval); + + /* Initialize MACCFG2. */ -- cgit v1.2.3