From dfffaea839fd631ec0b3d4f58540316a04c4f2ad Mon Sep 17 00:00:00 2001 From: blogic Date: Thu, 3 Nov 2011 15:15:52 +0000 Subject: lantiq: bump to 3.1 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@28721 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../0001-MIPS-lantiq-fix-early-printk.patch | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 target/linux/lantiq/patches/0001-MIPS-lantiq-fix-early-printk.patch (limited to 'target/linux/lantiq/patches/0001-MIPS-lantiq-fix-early-printk.patch') diff --git a/target/linux/lantiq/patches/0001-MIPS-lantiq-fix-early-printk.patch b/target/linux/lantiq/patches/0001-MIPS-lantiq-fix-early-printk.patch new file mode 100644 index 000000000..57b330d2a --- /dev/null +++ b/target/linux/lantiq/patches/0001-MIPS-lantiq-fix-early-printk.patch @@ -0,0 +1,60 @@ +From 91f8d0c8fbb9ea70bf78a291e312157177be8ee3 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 20 Aug 2011 18:55:13 +0200 +Subject: [PATCH 01/24] MIPS: lantiq: fix early printk + +The code was using a 32bit write operation in the early_printk code. This +resulted in 3 zero bytes also being written to the serial port. Change the +memory access to 8bit. + +Signed-off-by: Thomas Langer +Signed-off-by: John Crispin +Cc: linux-mips@linux-mips.org +--- + .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 4 ++++ + arch/mips/lantiq/early_printk.c | 14 ++++++++------ + 2 files changed, 12 insertions(+), 6 deletions(-) + +--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h ++++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +@@ -34,6 +34,10 @@ + #define LTQ_ASC1_BASE_ADDR 0x1E100C00 + #define LTQ_ASC_SIZE 0x400 + ++/* during early_printk no ioremap is possible ++ lets use KSEG1 instead */ ++#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR) ++ + /* RCU - reset control unit */ + #define LTQ_RCU_BASE_ADDR 0x1F203000 + #define LTQ_RCU_SIZE 0x1000 +--- a/arch/mips/lantiq/early_printk.c ++++ b/arch/mips/lantiq/early_printk.c +@@ -12,11 +12,13 @@ + #include + #include + +-/* no ioremap possible at this early stage, lets use KSEG1 instead */ +-#define LTQ_ASC_BASE KSEG1ADDR(LTQ_ASC1_BASE_ADDR) + #define ASC_BUF 1024 +-#define LTQ_ASC_FSTAT ((u32 *)(LTQ_ASC_BASE + 0x0048)) +-#define LTQ_ASC_TBUF ((u32 *)(LTQ_ASC_BASE + 0x0020)) ++#define LTQ_ASC_FSTAT ((u32 *)(LTQ_EARLY_ASC + 0x0048)) ++#ifdef __BIG_ENDIAN ++#define LTQ_ASC_TBUF ((u32 *)(LTQ_EARLY_ASC + 0x0020 + 3)) ++#else ++#define LTQ_ASC_TBUF ((u32 *)(LTQ_EARLY_ASC + 0x0020)) ++#endif + #define TXMASK 0x3F00 + #define TXOFFSET 8 + +@@ -27,7 +29,7 @@ void prom_putchar(char c) + local_irq_save(flags); + do { } while ((ltq_r32(LTQ_ASC_FSTAT) & TXMASK) >> TXOFFSET); + if (c == '\n') +- ltq_w32('\r', LTQ_ASC_TBUF); +- ltq_w32(c, LTQ_ASC_TBUF); ++ ltq_w8('\r', LTQ_ASC_TBUF); ++ ltq_w8(c, LTQ_ASC_TBUF); + local_irq_restore(flags); + } -- cgit v1.2.3